← Back to Patent Explorer
JPH07201745A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor wafer and manufacturing method thereof

Assignee: Hitachi Cable Ltd
•
Filing: 1993-12-28
•
Granted: —
•
Expires: 2013-12-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Translated from Japanese (57)【要約】 【目的】(0001)面サファイア基板の成長面を傾斜 することによって、GaNエピタキシャル結晶の純度及 び結晶性を大幅に向上し、かつ高濃度p型GaNをアズ グロウンの状態で得る。 【構成】サファイア単結晶基板の(0001)面を<2 1* 1* 0>方向もしくは<011* 0>方向に数度傾 けて鏡面研磨することにより、微傾斜(0001)面サ ファイア単結晶基板4とする。微傾斜(0001)面5 には多くのステップ6が存在する。このためステップ端 を基点としたGaNエピタキシャル結晶2のステップフ ローモード成長が容易に実現する。その結果、結晶欠陥 が大幅に低減する。 (57) [Summary] [Objective] By tilting the growth plane of a (0001) plane sapphire substrate, the purity and crystallinity of a GaN epitaxial crystal are significantly improved, and a high concentration p-type GaN is obtained in an as-grown state. . [Structure] The (0001) plane of the sapphire single crystal substrate is set to <2. A slightly inclined (0001) plane sapphire single crystal substrate 4 is obtained by mirror-polishing with a tilt of several degrees in the 1 * 1 * 0> direction or the <011 * 0> direction. Slightly inclined (0001) surface 5 There are many steps 6 in. Therefore, step flow mode growth of the GaN epitaxial crystal 2 with the step end as a starting point is easily realized. As a result, crystal defects are significantly reduced.

Inventors

  • 👤 Harunori Sakaguchi
  • 👤 春典 坂口
  • 👤 Ryuichi Nakazono
  • 👤 隆一 中園
  • 👤 Tsunehiro Unno
  • 👤 恒弘 海野
  • 👤 Shoji Kuma
  • 👤 彰二 隈

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 00:44
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag