Tab mounting structure for integrated circuit use

Abstract

Abstract Translated from Japanese (57)【要約】 （修正有） 【目的】 ＩＣチップをマザーボードに実装する集積回 路用ＴＡＢ実装構造に関し、ＩＣチップの単体及び接続 後のチェックが行え、実装面積の縮小化と接続の多端子 化が図れ、且つダイボンディングさせない実装構造の提 供を目的とする。 【構成】 一面に全接続パッド２を配したＩＣチップ１ と、ＩＣチップ１をフェイスダウンに搭載し、接続パッ ド２とバンプ３を介して溶着接続するＩＣ接続パッド４ を対向位置に配設し、反対面に夫々のＩＣ接続パッド４ に導通し、マザーボード９にバンプ33を介して溶着接続 させるマザーボード接続パッド５を、ＩＣチップ１の略 投射面積内に配設し、所望回路のＩＣ接続パッド４に通 じてその外周位置に検査用パッド６を配設し、マザーボ ード９との接続位置合わせを行うマーク７を周縁部に設 けた、両面又は多層に導体をパターン形成したＴＡＢテ ープ８とから構成する。 (57) [Summary] (Modified) [Purpose] Concerning the TAB mounting structure for an integrated circuit that mounts an IC chip on a mother board, the IC chip can be checked individually and after connection, reducing the mounting area and connecting multiple terminals. It is an object of the present invention to provide a mounting structure that can be realized in a compact structure and is not die-bonded. [Structure] IC chip 1 with all connection pads 2 arranged on one surface And the IC connection pad 4 which mounts the IC chip 1 face down and welds and connects it to the connection pad 2 via the bump 3. Are arranged at opposite positions, and the IC connection pads 4 are provided on the opposite surfaces. The mother board connecting pad 5 which is electrically connected to the mother board 9 and is welded and connected to the mother board 9 through the bumps 33 is disposed within a substantially projected area of the IC chip 1, and is connected to the IC connecting pad 4 of the desired circuit and is provided at the outer peripheral position for inspection. It is composed of a TAB tape 8 on which a pad 6 is provided and a mark 7 for aligning a connection position with a mother board 9 is provided on a peripheral portion, and a conductor is patterned on both surfaces or in multiple layers.

Inventors

• 👤 Hitoshi Nokimura
• 👤 均 除村
• 👤 Hiroyuki Otaguro
• 👤 浩幸 太田黒
• 👤 Yutaka Azumaguchi
• 👤 裕 東口

Bibliographic Details