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JPH0474380A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit

Assignee: NEC IC Microcomputer Systems Co Ltd
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Filing: 1990-07-13
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Granted: —
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Expires: 2010-07-13
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Abstract

Abstract PURPOSE:To improve the processing speed by inserting an address pointer, a comparing circuit, a control circuit, and an output control circuit into a data output circuit. CONSTITUTION:This circuit is provided with a comparing circuit 13 for inputting a write pointer signal for showing an address at the time of write and a read pointer signal for showing an address at the time of read and outputting a coincidence output signal only at the time of the same address, a control circuit 6 for inputting the coincidence output signal and a data input signal at the time of write and outputting a control output signal which becomes an output only at the time when an inversion signal of the data input signal at the time of this write and the coincidence output signal both exist, and an output control circuit 14 for inputting a control output signal inserted into a data line of an output circuit and turning off an outut from a memory cell 10 at the time when this control output signal exists. In such a way, a waiting time of a pre scribed time becomes unnecessary, and the processing speed can be increased.

Inventors

  • 👤 Masanori Oe
  • 👤 大江 正則
  • 👤 Takuji Takeda
  • 👤 竹田 卓司

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 23:05
CPC Classifications
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Claims Analysis

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References Cited (Backward Citations)

JPS63222392A Cited
JPS63255747A Cited
JPH0273591A Cited

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