Digital pll circuit

Abstract

Abstract PURPOSE:To improve the resolution by comparing a high-order data of an output data of a loop filter with a count of a counter and a low-order data of the output data of the loop filter with a timing pulse outputted from a ring oscillator. CONSTITUTION:Every time an input pulse comes, a phase error detection means 21 latches a value resulting from encoding plural timing pulses and a count of a counter and outputs the latched data to a loop filter 19 as a phase error data. An undesired frequency component is eliminated from the phase error data by the loop filter 19. Moreover, comparator means 12-14 compare a high- order data of an output data of the loop filter 19 with the count and compare a low-order data of the output data of the loop filter 19 with the timing pulse. When they are coincident with each other respectively, a coincident pulse is outputted and the coincident pulse is outputted as an output pulse in following to the input pulse. Thus, the resolution is improved and the processing of a high frequency pulse signal is attained.

Inventors

• 👤 Morihito Morishima
• 👤 守人 森島

Bibliographic Details