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JPH0442498A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory device and read/write method for semiconductor memory device

Assignee: Toshiba Corp
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Filing: 1990-06-08
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Granted: —
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Expires: 2010-06-08
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Abstract

Abstract PURPOSE:To shorten cycle time necessary for each access and to reduce the consumption amount of power by selecting plural first driving lines by a low address and selecting plural second driving lines and a sense amplifier by a column address. CONSTITUTION:Memory cells 11 are composed of a MOS type transistor 17 and a ferroelectric substance capacitor 18, and the only one memory cell 11 drives while selected by selecting a first and a second driving lines 4 and 13 respectively by the low address and the column address at the time of the access, and the information is taken out to only the read/write line 16 connected to this. Therefore, the readout can be performed when only the sense amplifier 20 connected to this read/write line 16 is selected by the column address to be activated at the time of reading. The same is true at the time of writing. Thus, the cycle time necessary for each access and the power consumption can be reduced.

Inventors

  • 👤 Kazuhide Abe
  • 👤 和秀 阿部
  • 👤 Hiroshi Toyoda
  • 👤 啓 豊田
  • 👤 Koji Yamakawa
  • 👤 晃司 山川
  • 👤 Motomasa Imai
  • 👤 今井 基真
  • 👤 Yasushi Sakui
  • 👤 康司 作井

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 20:04
CPC Classifications
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