← Back to Patent Explorer
JPH0422162A Expired / Lapsed JP ⏱️ 0.0 years remaining

Lead frame and semiconductor integrated circuit device using it

Assignee: Hitachi Microcomputer System Ltd
•
Filing: 1990-05-17
•
Granted: —
•
Expires: 2010-05-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To restrain a resin-molded package from being cracked at a test process such as a temperature cycle test, a thermal shock test or the like and at a soldering and mounting process by a method wherein a cutout part is formed and a die pad is divided by using the cutout part. CONSTITUTION:A semiconductor chip 4 is bonded to a die pad 8 via a thin bonding part composed of a silver paste; cutout parts 9 which are extended to the central direction from its outer circumference are formed in the die pad 8; and the pad 8 is divided into four parts by the parts 9. Molding resins on both the surface side and the rear surface side of the die pad 8 are bonded through the portions situated on the outer side of a chip mounting region 10 out of the parts 9; and it is possible to restrain that the molding resin on the rear surface side of the die pad 8 is contracted thanks to its bonding part. Thereby, it is possible to restrain a package crack caused by a thermal stress at a temperature cycle test, a thermal shock test and the like and a package crack caused by expansion of moisture at a soldering and mounting operation. It is possible to sharply increase the reliability and the yield of a semiconductor integrated circuit device 1.

Inventors

  • 👤 Yasuhisa Hagiwara
  • 👤 靖久 萩原
  • 👤 Fujio Ito
  • 👤 富士夫 伊藤
  • 👤 Kazunari Suzuki
  • 👤 一成 鈴木
  • 👤 Hiromichi Suzuki
  • 👤 博通 鈴木

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 13:21
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/701; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag