Semiconductor memory

Abstract

Abstract PURPOSE:To prevent erroneous read when reading out stored contents after erasing by detecting a threshold voltage by impressing a voltage to the control electrode of a memory cell when erasing the memory cell, and stopping an erasing operation based on the detected voltage. CONSTITUTION:A prescribed control voltage VREF is impressed to the control gates of all EPROM cells 10. In that state, by monitoring a bit line voltage and controlling timing for stopping erasing, the memory cell is prevented from being depressed by the high voltage for erasing to be impressed between a source and a drain, and the EPROM cell 10 can be effectively prevented from being excessively erased. In a read mode, the data is read out while detecting 1 and 0 according to a current value between the source and drain generated by impressing the prescribed voltage to the control gate of the cell 10. In the case of erasing, since depression is blocked, the current between the source and drain in the case of read flows based on an electric charge Q of the floating gate of the cell 10 corresponding to the value of the voltage impressed to the control gate.

Inventors

• 👤 Hiromi Kawashima
• 👤 川嶋　博美

Bibliographic Details