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JPH0335353A Expired / Lapsed JP ⏱️ 0.0 years remaining

Discrete cosine converting device

Assignee: Toshiba Corp
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Filing: 1989-07-01
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Granted: —
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Expires: 2009-07-01
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Abstract

Abstract PURPOSE:To simplify the circuit constitution by securing the n-stage cascade connection between the 1st and 3rd basic arithmetic circuits based on the 1st and 2nd basic arithmetic circuits set at the first and final stages respectively and the 3rd basic arithmetic circuit set at a stage following the first stage. CONSTITUTION:For the 2<n+1>-degree discrete cosine conversion arithmetic, a basic arithmetic unit A consisting of a circuit which stores temporarily the input data and performs the addition or the subtraction is used together with a basic arithmetic device B consisting of a circuit which stores temporarily the input data and performs the addition or the subtraction to the multiplication results smaller than the number of input data. Then a system is formed with the n-stage cascade connection of such a circuit where the circuit A is set at the first stage and the cascaded circuits B and A set at the stages following the first stage. Then a signal flow chart is computed in response to the value of (n), and a flow chart adverse to the signal flow chart computed in accordance with the value of (n) in the same circuit constitution as that used at conversion in an adverse conversion arithmetic mode. As a result, the circuit constitution is extremely simplified and therefore the discrete cosine conversion and its adverse conversion can be processed in a pipeline method.

Inventors

  • 👤 Yoshiharu Kamiya
  • 👤 義治 上谷

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-27 17:13
CPC Classifications
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