Analog/digital converter

Abstract

Abstract PURPOSE:To evade a limit on an analog input voltage range and the manufacturing yield decrease by adopting the the converter constitution as such that a P-N junction of a charge balanced sampling comparator is not biased forward. CONSTITUTION:This circuit is provided with a sample and hold circuit S/H 11 sampling an analog input VIN, a DAC(D/A converter) 14 receiving a reference voltage VREF and a comparator circuit CM1 comparing an analog input sampled by the S/H 11 and an output VDAC DAC 13. The DAC 13 is constituted by outputting 3 kinds of voltages and provided with comparators CM2, CM3 receiving an output of the DAC 13 in addition to the comparator circuit CM1. The CM2 compates 3/4 of the reference voltage VREF outputted from the DAC 13 with an analog input voltage VIN and the CM3 compares 1/4 of the reference voltage VREF outputted from the DAC 13 with the analog input voltage VIN. A successive approximation control section 12 is controlled by the output of the comparators CM1, CM2 and CM3.

Inventors

• 👤 Hideyo Kanayama
• 👤 金山　英世

Bibliographic Details