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JPH033335A Expired / Lapsed JP ⏱️ 0.0 years remaining

Bipolar bump transistor and manufacture thereof

Assignee: TDK Micronas GmbH
•
Filing: 1990-05-14
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Granted: —
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Expires: 2010-05-14
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Abstract

Abstract PURPOSE: To obtain a transistor which shows high current characteristics, excellent heat dissipation, etc., at a low cost, by partially covering a collector region, a base region and an emitter region, and installing a metal layer on the surface which layer is isolated by an insulating layer, and a contact bump arranged on the metal layer. CONSTITUTION: This bipolar transistor consists of the following; a substrate 1 of a first conductivity type which has a heavily doped lower layer 2 and an upper layer 3 doped less than the lower layer 2, a collector region 4 of a first conductivity type which is stretched from the surface of the upper layer 3 to the lower layer 2, forms a boundary and is heavily doped, a base region 7 of a second conductivity type which is contained in the upper layer 3 in the boundary keeping a distance from the collector region 4, an emitter region 8 of a first conductivity type which is buried in the base region 7, metal layers 91-93 on the surface which partially covers the collector region 4, the base region 7 and the emitter region 8 and is isolated by an insulating layer 6, and contact bumps 11-13 which are arranged on the metal layers 91-93 in the zone of the collector region 4, the base region 7 and the emitter region 8.

Inventors

  • 👤 Klaus Paschke
  • 👤 クラウス・パシュケ
  • 👤 Roland Zipfel
  • 👤 ローラント・ツイプフェル

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 19:34
CPC Classifications
H; H10; H10D; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10W; H10W72/00; H10W72/20; H10W72/251; H10W72/90; H10W72/951; H10W72/952

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