Non-volatile semiconductor memory

Abstract

Abstract PURPOSE:To prevent the generation of malfunction in a non-selected memory cell and to improve the reliability of the non-volatile semiconductor memory by collectively erasing memory cells in each block, and at the time of writing data in a certain block, inhibiting the impression of a writing signal to other blocks. CONSTITUTION:Erasing gates for respective memory cells in plural memory cell arrays 31-1 to 31-k are used in common in each block and connected to erasing lines EL1 to ELk. At the time of erasing the array 31-1, a decoder 44-1 is selected, an erasing voltage is impressed to the line EL1, all word lines in respective arrays 31 are turned to 0V and all the memory cells of the array 31-1 are simultaneously erased. At the time of writing, a writing voltage is outputted from an input circuit 36, a data line DL1 is set up to 10V, a word line WL1 is selected to write data in the cell M1. All block selection FETs 42-1 to 42-n in the unselected block arrays 31-2 to 31-k are turned off and all common drains 43 in the arrays 31-2 to 31-k are turned to almost 0V.

Inventors

• 👤 Masamichi Asano
• 👤 正通 浅野

Bibliographic Details