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JPH03224261A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Fujitsu Ltd
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Filing: 1990-01-30
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Granted: —
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Expires: 2010-01-30
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Abstract

Abstract PURPOSE:To improve the noise resistance of signal wirings by arranging wirings along the signal wirings, on the single sides or both sides of a plurality of the signal wirings through which in-phase signals are transmitted, and keeping said wirings in the floating state. CONSTITUTION:A signal wiring 11 is formed on a substrate 14 via an insulating layer 15. On both sides of the wiring 11, wirings 12, 13 are formed along the wiring 11, and kept in the floating state. The wirings 12, 13 have no function shielding the signal wiring 11, but have the function restraining micro.loading effect because the wiring 12, 13 are arranged along the signal wiring. Hence, by forming the signal wiring so as to be separated from other wirings, noise can be prevented from entering the signal wiring. Further, by connecting the wirings 12, 13 with a power supply, the signal wiring 11 can be shielded, so that a high integration degree can be realized by forming the signal wiring 11 so as to be adjacent to other wirings.

Inventors

  • 👤 Tatsuya Deguchi
  • 👤 達也 出口
  • 👤 Kazumasa Nawata
  • 👤 名和田 一正

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 15:21
CPC Classifications
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