Information processing system

Abstract

Abstract PURPOSE:To attain high efficiency in a scalar data load processing by performing the nullifying processing of all the contents of registration in a tag storage means replying to an area detecting signal when receiving the area detecting signal from an area detecting means. CONSTITUTION:An area detection circuit 12, when receiving a scalar load command, compares a scalar load address sent with the command with the output 105 of a vector store address area register circuit 7 and the output 119 of an area address reception circuit 15 which holds a vector store area address corresponding to the vector store operation of another information processor sent from another information processor via a bus 120. And it is compared whether or not the scalar load address is included in a vector store address area, and the area detecting signal is sent to a nullification circuit 19 via a bus 107 when it is included in the area, and the processing of a tag registration nullification circuit 11 is cancelled by the output of the nullification circuit 19, and also, all the tags of a tag memory circuit 8 are nullified by controlling a tag control circuit 9. In such a way, it is possible to improve the efficiency of a vector store processing.

Inventors

• 👤 Hiroyuki Nishimura
• 👤 西村　弘行

Bibliographic Details