Digital signal multiplex circuit

Abstract

Abstract PURPOSE:To simplify the circuit constitution of n-set of multiplex circuits each connecting to m-set of signal lines and to simplify wiring among circuit components by inputting n-set of channels each consisting of m-set of channels in parallel with m-set of n-stage parallel/serial shift registers and multiplexing m-set of signals subjected to serial processing for n-set. CONSTITUTION:m-Set of signals of a bit rate f0 given to n-set of channels C1-Cn respectively are inputted to shift registers S1-Sm in parallel by n-set of lines each. The signals on the channels C1-Cn become m-line serial signals b1-bm by n-channel by giving serial shift to the signals in each shift register by a frequency of f0Xn. When the m-line of signals b1-bm are multiplexed by a serial/ parallel conversion circuit (PS) T, a multiplex signal (a) by n-channel each consisting of m-bit with a bit rate of f0XnXm is produced. Thus, the wiring is simplified.

Inventors

• 👤 Katsuhiko Kurosawa
• 👤 黒沢　勝彦

Bibliographic Details