Cache memory controller

Abstract

Abstract PURPOSE:To improve reliability by controlling an access inhibition area of a cache memory, when an error has been detected in read-out data, and changing the constitution of the cache memory. CONSTITUTION:An error address holding circuit 8 holds an address of a cache memory 3 when an error detecting circuit 10 has detected at the time of detecting an error. Also, an access inhibition area control circuit 9 controls an access inhibition area of the cache memory 3 by an error address of the error address holding circuit 8 at the time of detecting an error of a fixed fault. Thereafter, a main storage device 2 is brought to access by the address held in the error address holding circuit 8, and by re-registering it in other area than the access inhibition area of the cache memory 3, the operation is restarted. In such a way, the reliability is raised.

Inventors

• 👤 Kenzo Tanimoto
• 👤 谷本　謙造

Bibliographic Details