← Back to Patent Explorer
JPH0223671A Expired / Lapsed JP ⏱️ 0.0 years remaining

Non-volatile semiconductor memory device and manufacture thereof

Assignee: Toshiba Corp
•
Filing: 1988-07-12
•
Granted: —
•
Expires: 2008-07-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To prevent erroneous write operation upon reading from being produced and a read current in write operation from being lowered by forming a p type diffusion layer in a first n type diffusion layer and opening, by deposition of an interlayer insulating film over the whole surface of the p type diffusion layer, a connection hole with a gate electrode, a connection hole with a second n type diffusion layer, and a common connection hole between the first n type diffusion layer and the p type diffusion layer, and further burying metal in those holes. CONSTITUTION:After formation of a floating gate 7a, a p type diffusion layer 9 is formed in an n type diffusion layer 2, and an n type diffusion layer 8 is formed so as to hold a p type semiconductor substrate 1 channel between it and the layer 2. An insulating film 20 is deposited, a common gate electrode 15 between the layers 2 and 9 is formed, a connection hole between the gate electrode 15 and the layer 8 is opened, and metal is buried to form electrodes 21a, b, c. Write operation is performed by an n type transistor which employs between the drain layer 2 and the source layer 8 as a channel, while read operation is performed by a p type transistor which employs between the substrate 1 and the source layer 9 as a channel. Hereby, erroneous write operation upon reading is prevented as well as lowering of a read current upon write operation is prevented.

Inventors

  • 👤 Daisuke Toyama
  • 👤 大介 遠山

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 19:58
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag