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JPH02197136A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Panasonic Electric Works Co Ltd
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Filing: 1989-01-26
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Granted: —
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Expires: 2009-01-26
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Abstract

Abstract PURPOSE:To facilitate a work and to improve the reverse withstand voltage characteristics of a device by a method wherein element formation regions are respectively covered with a mask provided with each sidewall on its side surfaces to inhibit the areas of the element formation regions from becoming narrow. CONSTITUTION:A thermal oxide film 2 is formed on the surface of a P-type Si substrate 1 and oxide films 2' only at element formation region parts are left by selective etching. Then, after a thermal oxide film 2'' is grown at a part, from which the film 2 is removed, an Si nitride film 3 is laminated. The film 3 is etched to form sidewalls (SWs) 13 consisting of an Si nitride film on the side surfaces of the films 2'. After boron is ion-implanted in surface parts 1a, field oxide films 5 and channel stopper regions 12 are formed by an oxidation treatment. The films 2' are removed by etching using a photoresist pattern to leave the SWs 13 and the element formation regions A are formed. MOSFETs are respectively formed at these regions A. Gate oxide films 8 are formed, gate electrodes 9 are respectively formed on them, phosphorus is ion- implanted using the electrodes 9 and the SWs 13 as masks to provide source and drain regions 10 and 11 and the SWs 13 are removed.

Inventors

  • 👤 Naomasa Oka
  • 👤 直正 岡
  • 👤 Takashi Saijo
  • 👤 隆司 西條

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 19:35
CPC Classifications
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