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JPH02196462A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Mitsubishi Electric Corp
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Filing: 1989-01-24
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Granted: —
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Expires: 2009-01-24
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Abstract

Abstract PURPOSE:To obtain a semiconductor device having a structure which is difficult to make the scattering arise in characteristics by mounting the dummy gate of a memory transistor which does not function actually at the outer peripheral part of gates of a memory transistor which functions actually so that its dummy gate is adjacent to a pattern at an endmost part of the foregoing gates. CONSTITUTION:In an EPROM, the dummy gate 8 of a memory transistor which does not function actually is mounted on an outer peripheral part of gates 3 of the memory transistor which functions actually in such a manner that its dummy gate is adjacent to an endmost part of the foregoing gates 3. For example, simultaneously with the formation of control gates 3 having memory cells which function actually as the EPROM, the dummy gate 8 which does not function actually but has a similar cross section structure is formed. The scattering of gate lengths L 1-L 5 of the control gates 3 which function actually is thus suppressed to a small extent. Consequently, this approach makes the scattering of characteristics of the memory transistor smaller only by taking a minimum space.

Inventors

  • 👤 Hajime Arai
  • 👤 新井 肇
  • 👤 Hidenori Arita
  • 👤 有田 英徳
  • 👤 Kazuaki Miyata
  • 👤 和明 宮田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 02:39
CPC Classifications
H; H10; H10B; H10B41/00; H10B41/10; H10B69/00

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