Semiconductor storage device

Abstract

Abstract PURPOSE:To realize the high speed access for reading without deteriorating writing characteristics by selecting two or more different bit lines in response to designated address, and making access to two or more different memory cells. CONSTITUTION:A word line WLm corresponding with a designated adress is selected; by a column select signal Y1, two column transistors Tyi1, Tyi2 are made to turn ON; via two bit lines BLi1, BLi2, write/read is executed for two memory cells Qi1, Qi2. At the time of reading, two lines BLi1, BLi2 are connected to a signal output terminal 4 for a sensing amplifier, and a cell current is doubled, so that the current driving capability of the sensing amplifier increases wlth well balance, and the sensing speed is improved. Thereby, access speed at the time of reading can be increased without deteriorating writing characteristics at the time of writing operation.

Inventors

• 👤 Shinichi Mori
• 👤 森　真一
• 👤 Kenji Koda
• 👤 香田　憲次

Bibliographic Details