semiconductor equipment
Abstract
Abstract PURPOSE:To assure a high gain band width by forming on a semiconductor substrate an epitaxial layer of a low doping level by antimony and an intrinsic epitaxial layer, and forming a longitudinal PNP transistor having a high doping level p type buried collector layer. CONSTITUTION:An n type buried layer 2 and a p type buried layer 3 are selectively formed on a p type wafer as a substrate 1. Then, an antimony-doped epitaxial layer 4 is laminated. Further, a p type buried layer 5 is formed by selectively diffusing a p type boron. Additionally, a substantially intrinsic epitaxial layer 6 is laminated. Then, an interelement isolation region, an n type diffusion layer 7, and a p type diffusion layer 8 are selectively formed. Then, after selective oxidation is performed with active regions of respective elements left behind, a p type base layer 9 and an n type base layer 10 are formed, and further an n type surface diffusion layer 11 and a high concentration p type surface diffusion layer 12 are formed. Further, a polysilicon gate 13 is formed through a thin oxide film and rendered to passivation, hole-making, and wiring. Hereby, the title semiconductor device can be yielded in which both bipolar transistor and MOS transistor have complementary characteristics with high speed operation and low power consumption.
Inventors
- 👤 Takashi Mihara
- 👤 孝士 三原
- 👤 Shinji Kaneko
- 👤 新二 金子
- 👤 Kiyoshi Nemoto
- 👤 清志 根本
- 👤 Toshio Niwa
- 👤 丹羽 寿雄
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.