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JPH021120A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Oki Electric Industry Co Ltd
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Filing: 1989-02-17
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Granted: —
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Expires: 2009-02-17
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Abstract

Abstract PURPOSE:To form a silicide layer for wiring part use without spoiling a junction depth formed at the beginning by a method wherein, after A high-melting-point metal has been deposited on a source-drain region of a MoS type semiconductor device, an amorphous silicon (a-Si) layer is formed and a silicide is formed by this a-Si and the high-melting-point material. CONSTITUTION:A high-melting-point metal is deposited; after that, a-Si 8 is deposited so as to cover a source-drain region 6 completely; in order to avoid conduction between a gate 3 and the source-drain region, an edge of the a-Si is situated on side walls 6. After that, the high-melting-point metal reacts with the a-Si in an upper layer by a reaction to form a silicide so that the silicide formed in the source-drain region does not creep into a silicon substrate 1. Thereby, a junction depth can be made shallow without regard to a silicide film thickness; a wiring resistance can be reduced by forming a thicker silicide film 9.

Inventors

  • 👤 Masao Sawachi
  • 👤 澤地 雅男
  • 👤 Jiro Ida
  • 👤 次郎 井田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 14:23
CPC Classifications
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