Mos differential amplifier circuit

Abstract

Abstract PURPOSE:To enable an in-phase input voltage range to be used fully over a positive/negative power voltage without offset by using a current proportional to a current flowing to a FET being an active load of the operating stage comprising the combination of 1st and 2nd differential amplifier circuits comprising components with different polarity from each other. CONSTITUTION:A current corresponding to a differential voltage from an input terminal 2 via a differential stage comprising constant current sources 11, 12, the 1st and 2nd differential amplifier circuits comprising different polarity of p-channel FETM1, M2 and n-channel FETM7, M8 and 1st - 3rd mirror circuits comprising p-channel FETM3 and M4, M5 and M6 and n-channel FETM9 and M10 flows to the FETM9 of the differential stage. Then a bias is given to an n-channel FETM14 at the output stage by a current proportional to the current. Thus, the in-phase input voltage range is able to be taken folly over the positive and negative power voltage and the production of an offset voltage even when the in-phase input voltage is near the power voltage is prevented according to the selection of the size of the FETM14.

Inventors

• 👤 Yasunori Hara
• 👤 靖典 原

Bibliographic Details