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JPH021006A Expired / Lapsed JP ⏱️ 0.0 years remaining

Microcomputer

Assignee: NEC Corp
•
Filing: 1988-03-01
•
Granted: —
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Expires: 2008-03-01
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Abstract

Abstract PURPOSE:To reduce the power consumption from the time of the stand-by mode by controlling connection or disconnection of feedback resistances of all oscillating circuits in a microcomputer incorporating plural oscillating circuits. CONSTITUTION:When an oscillating circuit for a high frequency will be used, a connection control signal 15 is set to the low level to disconnect a feedback resistance 14 from terminals 16 and 17. Consequently, a current path passing the resistance 14 is eliminated when the terminal 16 is set to the low level; and if the oscillating circuit for the high frequency is stopped in the stand-by mode, the power consumption of the whole of the microcomputer is about zero. Meanwhile, when the microcomputer will be operated in a low-power consumption state, a connection control signal 10 is set to the low level to disconnect the current path of a feedback resistance 9, and the signal 15 is set to the high level to connect a crystal oscillator for a low frequency to terminals 16 and 17 and an oscillation signal is obtained, thereby using it as the system clock of the microcomputer.

Inventors

  • 👤 Hiroshi Hikichi
  • 👤 博 引地

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 03:40
CPC Classifications
Y; Y02; Y02D; Y02D10/00

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS59195726A Cited
JPS6155721A Cited
JPS61109126A Cited

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