← Back to Patent Explorer
JP2002133876A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor storage device

Assignee: Hitachi Ltd
•
Filing: 2000-10-23
•
Granted: —
•
Expires: 2020-10-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Translated from Japanese (57)【要約】 【課題】 高信頼で大記憶容量化を実現し、使い勝手の よい半導体記憶装置を提供する。 【解決手段】 3値以上の情報電圧をそのゲートに保持 するMOSFETと、上記3値以上の情報電圧を上記M OSFETのゲートに与える書き込み用トランジスタ と、上記MOSFETと直列形態に接続された読み出し 用トランジスタとを含むメモリセルを用い、上記MOS FETのソースに対して、ソース線により上記3値以上 の情報電圧に対応した複数の参照電圧を与えて、かかる 複数通りの参照電圧に対応した上記MOSFETのオン 状態/オフ状態の組み合わせによりデジタルデータを形 成し、あるいは上記MOSFETのソース電圧をそのま ま読み出し電圧として出力させる。 (57) [Problem] To provide a semiconductor memory device which realizes high reliability and large storage capacity and is easy to use. SOLUTION: A MOSFET for holding a ternary or more information voltage at its gate, and a MOSFET for holding the ternary or more information voltage to the M A memory cell including a write transistor applied to the gate of an OSFET and a read transistor connected in series with the MOSFET is used. A plurality of reference voltages corresponding to the three or more information voltages are applied to the source of the FET by a source line, and digital data is obtained by a combination of the ON state / OFF state of the MOSFET corresponding to the plurality of reference voltages. Or the source voltage of the MOSFET is directly output as a read voltage.

Inventors

  • 👤 Masaya Muranaka
  • 👤 雅也 村中
  • 👤 Yutaka Ito
  • 👤 伊藤  豊

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 12:26
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/56; G11C11/5692; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0433; H; H10; H10B; H10B12/00; H10B69/00; H10D; H10D86/00; H10D86/201

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPH03116494A Cited
JPH11512208A Cited
JPH10228781A Cited
JP2000058681A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag