Patent EP0403415A2 successfully refreshed from Google Patents.
EP1555595A2
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EP
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Apparatus for controlling power of processor having a plurality of cores and control method of the same
Assignee: LG Electronics Inc
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Filing: 2004-12-01
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Granted: —
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Expires: 2024-12-01
Abstract
Abstract Embodiments of an apparatus and methods for controlling power of a processor having a plurality of cores can independently control individual or selected cores and power supply circuits corresponding to the cores based on, for example, an operation state of the processor or a power mode. Embodiments of an apparatus for controlling power of a processor having a plurality of cores can include a plurality of power supply units each capable of independently supplying a supply power to a plurality of cores provided in one processor, a unit for checking at least one among a use state, a use amount and a power mode of each core and for turning on/off each checked core, and a unit that contacts with the unit for checking for controlling the power supply units in response to an on/off operation of each core.
Inventors
- 👤 Jang Geun Oh
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 13:42
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/50; G06F9/5083; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3234; G06F1/3287; G06F9/5094; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
85 words
An apparatus for controlling power of a processor having a plurality of cores,
comprising: a plurality of power supply means each for independently supplying power to
one of a plurality of cores provided in one processor; means for checking at least one among a core use state, a core power mode or
a core use amount of each core and for turning on/off said each core; and means for controlling the plurality of power supply means according to said
on/off operation of said each core.
Claim 2
Dependent Claim
21 words
The apparatus of claim 1, wherein said power supply means includes a
plurality of DC/DC converters and a power input unit.
Claim 3
Dependent Claim
28 words
The apparatus of claim 1 or 2, wherein said means for checking said each
core and for turning on/off said each core is a plurality of device drivers.
Claim 4
Dependent Claim
28 words
The apparatus of claim 1 or 2, wherein said means for checking said each
core and for turning on/off said each core is at least one device driver.
Claim 5
Dependent Claim
36 words
The apparatus of claim 4, wherein an embedded controller controls one of the
power supply means for supplying power to each corresponding core in response to the
control of said each core by the device driver.
Claim 6
Dependent Claim
42 words
The apparatus of claim 5, wherein said power supply means includes a
plurality of DC/DC converters and power input units, wherein said DC/DC converters and
power input units that correspond to the plurality of power supply means are connected
with one another.
Claim 7
Independent Claim
56 words
The apparatus of any of claims 1 to 6, wherein the core power mode is at least one
member chosen from (1) a higher performance mode, (2) an adaptive mode having
performance requirements that change responsive to a current processor amount of use, and
(3) a power saving mode to reduce power consumption by the processor.
Claim 8
Independent Claim
51 words
A method for controlling power of a processor having a plurality of cores,
comprising. checking a use state of each of a plurality of cores provided in one processor;
and independently disconnecting power supplied to at least one core that is not
being currently used as a result of the checking.
Claim 9
Dependent Claim
37 words
The method of claim 8, wherein a device driver provided in an operating
system (OS) checks said at least one core that is not currently used among the plurality of the
cores provided in said one processor.
Claim 10
Dependent Claim
40 words
The method of claim 9, wherein an embedded controller independently turns
off a corresponding power supply that supplies power to each core when the device driver
provided in the OS turns off said each core that is not currently used.
Claim 11
Dependent Claim
22 words
The method of claim 10, wherein a power supplied to a user selected core
among the plurality of cores is independently disconnected.
Claim 12
Independent Claim
23 words
The method according to any of claims 8 to 11, comprising discontinuing use of a core when an error occurs in said core.
Claim 13
Dependent Claim
20 words
The method of claim 12, comprising determining system failure when an error
occurs in all of the plurality of cores.
Claim 14
Independent Claim
29 words
The method of any of claims 8 to 13,
comprising independently setting the use state of at
least one core according to a power management mode of the processor.
Claim 15
Independent Claim
51 words
A method for controlling power of a processor having a plurality of cores,
comprising: checking a power management mode of a processor having a plurality of
cores; and selectively turning on each core of said plurality of cores based on the checked
management mode and the use amount of the processor.
Claim 16
Dependent Claim
61 words
The method of claim 15, wherein said checking a power management mode
comprises checking whether the power management mode is at least one member chosen
from (1) a higher performance mode, (2) an adaptive mode having performance
requirements that change responsive to a current processor amount of use, and (3) a power
saving mode to reduce power consumption by the processor.
Claim 17
Dependent Claim
34 words
The method of claim 15, wherein said checking a power management mode of
a processor comprises checking whether the power management mode set in the processor
is a none mode or an adaptive mode.
Claim 18
Dependent Claim
57 words
The method of claim 17, wherein when the checked power management
mode is the none mode, a device driver of an operating system (OS) turns on all of the
cores, and an embedded controller turns on all of a plurality of DC/DC converters, wherein
each DC/DC converter respectively provides power to one of said plurality of cores.
Claim 19
Dependent Claim
74 words
The method of claim 17, wherein when the power management mode is the
adaptive mode, a single selected core among the plurality of the cores is turned on,
comprising: determining a use amount of the selected core; enabling at least one additional core when the use amount is greater than a
first prescribed value; and disabling said at least one additional core when a processor use amount is less
than a second prescribed value.
Claim 20
Dependent Claim
61 words
The method of claim 17, wherein when the none mode or the adaptive mode
is set, when an error occurs in a prescribed core, the power management mode is
automatically set to a constant mode, and the prescribed core having the error is turned off,
and a DC/DC converter that supplies power to the core having an error is turned off.
Claim 21
Independent Claim
45 words
The method of any of claims 15 to 20, wherein a device driver performs the on/off controls
and the use amount checks of the cores, respectively, and wherein an embedded controller
performs the on/off controls of DC/DC controllers that supply power to the cores,
respectively.
Claim 22
Dependent Claim
45 words
A portable computer, comprising: a first circuit configured to determine a use state of a plurality of cores of a
single processor; and a second circuit configured to independently provide power to at least two
cores based on the corresponding use state of the core.
Claim 23
Dependent Claim
20 words
The portable computer of claim 22, wherein the use state includes a core use
state and a core use amount.
Claim 24
Dependent Claim
70 words
The portable computer of claim 23, wherein the second circuit is configured
to operate according to a power management mode of the processor, wherein the power
management mode is at least one member chosen from (1) a higher performance mode, (2)
an adaptive mode having performance requirements that change responsive to a current
processor amount of use, and (3) a power saving mode to reduce power consumption by the
processor.
References Cited (Backward Citations)
No citation records indexed.
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