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EP1213657A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Dual interface serial bus

Assignee: Texas Instruments Inc
•
Filing: 2001-12-10
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Granted: —
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Expires: 2021-12-10
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Abstract

Abstract An electronic device (400) includes a dual interface serial bus that can support either the I2C or SPI serial interfaces. The device (400) defaults using the I2C serial interface for the transmission and reception of data. However, when the CE line (406) transitions from a logic high to a logic low state, the device (400) automatically reprograms the I/O to support the SPI interface standard. Both interfaces are supported without the use of an additional interface selection pin (308). <IMAGE>

Inventors

  • 👤 Reza Tanha

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 14:16
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/42; G06F13/4282; G06F13/4291

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 87 words
An electronic device capable of operating using either a first or a second interface protocol, comprising: a clock enable input port for receiving a clock enable signal; a data port for receiving and transmitting data into and out of the electronic device; and the electronic device in response to detecting a change in logic state in the clock enable signal causes the electronic device to automatically switch from using the first interface protocol to the second interface protocol in transmitting and receiving data over the data port.
Claim 2
Dependent Claim 30 words
An electronic device as defined in claim 1, wherein the first interface protocol comprises the I2C serial interface protocol and the second interface protocol comprises the SPI serial interface protocol.
Claim 3
Dependent Claim 48 words
An electronic device as defined in claim 2, wherein the electronic device automatically switches using the I2C serial interface protocol and starts using the SPI serial interface protocol when the electronic device detects that the clock enable signal goes from a logic high to a logic low condition.
Claim 4
Dependent Claim 23 words
An electronic device as defined in claim 3, wherein the electronic device further comprises a clock signal port for receiving a clock signal.
Claim 5
Dependent Claim 54 words
An electronic device as defined in claim 4, wherein when data using the SPI serial interface protocol is sent to the data port at least the first bit of information received is a don't care bit which gives the electronic device time to switch from using the I2C to the SPI serial interface protocol.
Claim 6
Dependent Claim 49 words
An electronic device as defined in claim 1, wherein the electronic device upon detecting that the clock enable port has switched back to its original logic state, causes the electronic device to switch back to using the first interface protocol when transmitting and receiving data over the data port.
Claim 7
Dependent Claim 17 words
An electronic device as defined in claim 1, wherein the electronic device comprises an integrated circuit (IC).
Claim 8
Independent Claim 92 words
A method for automatically switching the interface protocol used by an electronic device to transmit and receive data over a data port, the electronic device having a clock enable port, the method comprising the steps of: determining if the logic level in the electronic device's clock enable port has switched logic levels; and switching the interface protocol used by the electronic device to receive data over the data port from a first to a second interface protocol if it is determined that the electronic device's clock enable port has switched logic levels.
Claim 9
Dependent Claim 29 words
A method as defined in claim 8, wherein the first interface protocol comprises the I2C serial interface protocol and the second interface protocol comprises the SPI serial interface protocol.
Claim 10
Dependent Claim 33 words
A method as defined in claim 7, wherein the determining step comprises detecting that the logic level in the clock enable port has gone from a logic high to a logic low level.
Claim 11
Dependent Claim 26 words
A method as defined in claim 9, wherein the clock enable port can stay at a logic low level for only a predetermined period of time.
Claim 12
Dependent Claim 44 words
A method as defined in claim 8, wherein the switching step also causes the electronic device to switch from the first to the second interface protocol and use the second interface protocol for all data transmitted by the electronic device over the data port.

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