EP1100193A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Integrated filter with improved I/O matching and method of fabrication
Assignee: NXP USA Inc
•
Filing: 2000-10-30
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Granted: —
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Expires: 2020-10-30
Abstract
Abstract An integrated filter circuit and a method of fabrication are disclosed, wherein the integrated filter (11) has an input and an output parasitic shunt impedance. Input (17) and output (19) electrical components are coupled to the input (14) and output (15) terminals, respectively, to reduce the input and output parasitic shunt impedances. The input and output electrical components each include one of a coil (17,19), a section of transmission line (27,29), a coil (47,49) and tuneable capacitance (46,48) connected in a series tuned circuit, or a coil (37,39) and tuneable capacitance (26,38) connected in a parallel tuned circuit. The integrated filter includes input and output multilayer ceramic integrated coils (58) which may be positioned so that capacitive coupling between the coils substantially cancels inductive coupling therebetween, and/or an interlayer gridded ground wall is positioned between the input and output coils
Inventors
- 👤 Wang-Chang A. Gu
- 👤 Richard Stephen Kommrusch
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 17:42
CPC Classifications
H; H03; H03H; H03H7/00; H03H7/38; H03H9/00; H03H9/0004; H03H7/01; H03H7/17; H03H7/1741; H03H7/1758; H03H7/1775; H03H7/383; H03H9/02; H03H9/05; H03H9/0538; H03H9/0542
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
73 words
An integrated filter circuit with improved I/O
matching characterised by: an integrated filter (11) having an input terminal (14)
with input parasitic shunt impedance and an output terminal
(15) with output parasitic shunt impedance; an input electrical component (17,27,36,37,46,47)
coupled to the input terminal so as to reduce the input
parasitic shunt impedance; and an output electrical component (13,29,38,39,45,49)
coupled to the output terminal so as to reduce the output
parasitic shunt impedance.
Claim 2
Dependent Claim
27 words
An integrated filter circuit with improved I/O
matching as claimed in claim 1 wherein the input and output
electrical components are integrated into the integrated
filter circuit.
Claim 3
Dependent Claim
57 words
An integrated filter circuit with improved I/O
matching as claimed in claim 1 wherein the input and output
electrical components each include one of an inductive coil,
a section of transmission line, an inductive coil and
tunable capacitance connected in a series tuned circuit, and
an inductive coil and tunable capacitance connected in a
parallel tuned circuit.
Claim 4
Dependent Claim
23 words
An integrated filter circuit with improved I/O
matching as claimed in claim 1 wherein the integrated filter
includes a plurality of filter sections.
Claim 5
Dependent Claim
36 words
An integrated filter circuit with improved I/O
matching as claimed in claim 4 wherein the plurality of
filter sections each include a surface acoustic wave
resonator, a voltage variable capacitor, and a multilayer
ceramic integrated coil.
Claim 6
Dependent Claim
56 words
An integrated filter circuit with improved I/O
matching as claimed in claim 4 wherein the plurality of
filter sections each include an intermediate parasitic shunt
impedance between adjacent coupled sections and the
integrated filter circuit further includes an intermediate
electrical component coupled to the adjacent coupled
sections so as to reduce the intermediate parasitic shunt
impedance.
Claim 7
Independent Claim
83 words
A method of fabricating an integrated filter
circuit with improved I/O matching characterised by the
steps of: forming an integrated filter (11) having an input
terminal (14) with input parasitic shunt impedance and an
output terminal (15) with output parasitic shunt impedance; forming an input electrical component
(17,27,36,37,46,47) coupled to the input terminal so as to
reduce the input parasitic shunt impedance; and forming an output electrical component
(13,29,38,39,45,49) coupled to the output terminal so as to
reduce the output parasitic shunt impedance.
Claim 8
Dependent Claim
58 words
A method of fabricating an integrated filter
circuit with improved I/O matching as claimed in claim 7
wherein the step of forming the integrated filter includes
forming a plurality of filter sections connected in series,
each of the plurality of filter sections including a surface
acoustic wave resonator, a voltage variable capacitor, and a
multilayer ceramic integrated coil.
Claim 9
Dependent Claim
62 words
A method of fabricating an integrated filter
circuit with improved I/O matching as claimed in claim 8
wherein the step of forming a plurality of filter sections
includes forming each section with an intermediate parasitic
shunt impedance between adjacent coupled sections and
forming an intermediate electrical component coupled to the
adjacent coupled sections so as to reduce the intermediate
parasitic shunt impedance.
Claim 10
Dependent Claim
45 words
A method of fabricating an integrated filter
circuit with improved I/O matching as claimed in claim 7
wherein the steps of forming the input electrical component
and forming the output electrical component include
integrating the input and output electrical components into
the integrated filter circuit.
References Cited (Backward Citations)
JPH0998056A
Cited
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