EP1059677A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method for manufacturing a nitride semiconductor device and device manufactured by the method
Assignee: Resonac Holdings Corp
•
Filing: 2000-06-07
•
Granted: —
•
Expires: 2020-06-07
Abstract
Abstract A group III nitride semiconductor device is disclosed which has a reduced number of threading dislocations adversely affecting characteristics of the group III nitride semiconductor device. A method for manufacturing the group III nitride semiconductor device controls pit formation in a GaN layer formed on a sapphire substrate. First, a low temperature buffer layer is formed on a sapphire substrate by MOCVD. An undoped GaN layer having a predetermined thickness is then grown on the low temperature buffer layer. Next, a GaN layer containing magnesium as a dopant is formed on the layer at a lower pressure than that of depositing the GaN layer, which results in filling pits generated on the GaN layer to flatten the surface of another GaN layer.
Inventors
- 👤 Atsushi Corporate Research Develop. Lab Watanabe
- 👤 Toshiyuki Corporate Research Develop. Lab Tanaka
- 👤 Hiroyuki Corporate Research Develop. Lab Ota
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 14:28
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/24; H01; H01S; H01S5/00; H01S5/30; H01S5/32; H01S5/323; H01S5/32308; H01S5/32341; H10H; H10H20/00; H10H20/80; H10H20/81; H10H20/815; H10H20/822; H10H20/824; H10H20/825; H10P14/29; H10P14/2901; H10P14/2921; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3216; H10P14/3242; H10P14/3244; H10P14/3248; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3416; H10P14/3438; H10P14/3441; H10P14/3444; H01S2304/00; H01S2304/04; H10H20/01; H10H20/011; H10H20/013; H10H20/0133; H10H20/01335
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
123 words
A method for manufacturing a nitride semiconductor
device by successively forming a group III nitride
semiconductor layer (In x Ga (1-x-y) Al y N (0≤x≤1, 0≤y≤1)) on a flat
surface of a sapphire substrate by metal-organic chemical
vapor deposition, said method comprising the steps of: forming a low temperature buffer layer on said sapphire
substrate; forming a first gallium nitride layer by supplying a
first mixed gas containing no dopant component; and forming a second gallium nitride layer containing a
dopant on said first gallium nitride layer by supplying a
second mixed gas containing a dopant component, while filling
voids in said first gallium nitride layer from the surface
thereof with said second gallium nitride layer to flatten
said first gallium nitride layer.
Claim 2
Dependent Claim
37 words
The method for manufacturing a nitride semiconductor
device according to claim 1, wherein said step of forming the
second layer is carried out at a pressure lower than that of
said step of forming the first layer.
Claim 3
Dependent Claim
37 words
The method for manufacturing a nitride semiconductor
device according to claim 1, further comprising the step of
forming a third gallium nitride layer by supplying a mixed
gas containing no dopant on said second gallium nitride layer.
Claim 4
Dependent Claim
45 words
The method for manufacturing a nitride semiconductor
device according to claim 1, wherein said second gallium
nitride layer has a thickness sufficient to flatten the
surface of the formed second gallium nitride while filling
voids in said first gallium nitride layer from the surface
thereof.
Claim 5
Dependent Claim
24 words
The method for manufacturing a nitride semiconductor
device according to claim 1, wherein said first gallium
nitride layer has a predetermined thickness of 0.2-4µm.
Claim 6
Dependent Claim
20 words
The method for manufacturing a nitride semiconductor
device according to claim 1, wherein said dopant is a group
II element.
Claim 7
Dependent Claim
17 words
The method for manufacturing a nitride semiconductor
device according to claim 1, wherein said dopant is magnesium.
Claim 8
Dependent Claim
127 words
A nitride semiconductor device manufactured by
successively forming a group III nitride semiconductor layer
(In x Ga (1-x-y) Al y N (0≤x≤1, 0≤y≤1)) on a flat surface of a sapphire
substrate, said device comprising: a low temperature buffer layer formed on said sapphire
substrate; a first gallium nitride layer having a predetermined
thickness and containing no dopant component, said first
gallium nitride layer being formed on said low-temperature
buffer layer; and a second gallium nitride layer having a second
predetermined thickness and containing a dopant component,
said second gallium nitride layer being formed on said first
gallium nitride layer; wherein said second gallium nitride layer is formed while
flattening said first gallium nitride layer by filling voids
in said first gallium nitride layer from the surface thereof.
Claim 9
Dependent Claim
31 words
The nitride semiconductor device according to claim
8, wherein said second gallium nitride layer is formed at a
lower pressure than the pressure used for depositing said
first gallium nitride layer.
Claim 10
Dependent Claim
32 words
The nitride semiconductor device according to claim
8, further comprising a third gallium nitride layer
containing no dopant component, said third gallium nitride
layer being formed on said second gallium nitride layer.
Claim 11
Dependent Claim
41 words
The nitride semiconductor device according to claim
8, wherein said second gallium nitride film has a thickness
sufficient to flatten the surface of the formed second
gallium nitride while filling voids in said first gallium
nitride layer from the surface thereof.
Claim 12
Dependent Claim
23 words
The nitride semiconductor device according to claim
8, wherein said predetermined thickness of said first gallium
nitride layer equals a thickness of 0.2-4µm.
Claim 13
Dependent Claim
16 words
The nitride semiconductor device according to claim
8, wherein said dopant is a group II element.
Claim 14
Dependent Claim
13 words
The nitride semiconductor device according to claim
8, wherein said dopant is magnesium.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.