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EP0895238A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Error compensation circuit for compensating for parameter errors of IC chip having filter and boost circuit

Assignee: Samsung Electronics Co Ltd
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Filing: 1998-07-16
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Granted: —
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Expires: 2018-07-16
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Abstract

Abstract An error compensation circuit for compensating for a frequency error and a boost error of an IC chip having a filter (30) and a boost circuit (40). The error compensation circuit includes a frequency compensation circuit (50, 70), a boost compensation circuit (60, 70), and a switch being switchable in response to a mode control signal. The frequency compensation circuit (50, 70) includes a first level detector (51-53) for detecting a level of a signal output from the filter (30); a first level comparator (55) for comparing an output level of the first level detector (51-53) with a reference signal level (54); a first integrator (56) for integrating an output of the first level comparator (55) to generate a frequency error signal; and a first data storage (72a, 74a, 76a) for converting the frequency error signal into digital data, storing the digital data, converting the stored digital data into an analog frequency compensation signal in the normal signal processing mode, and providing the frequency compensation signal to the filter (30). The boost compensation circuit includes a second level detector for detecting a level of a signal output from the boost circuit; a second level comparator for comparing an output level of the second level detector with the reference signal level; a second integrator for integrating an output of the second level comparator to generate a boosting error signal; and a second data storage for converting the boosting error signal into digital data, storing the digital data, converting the stored digital data into an analog boost compensation signal in the normal signal processing mode, and providing the boost compensation signal to the boost circuit (40).

Inventors

  • 👤 Chun-Sup Kim

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 17:50
CPC Classifications
H; H03; H03H; H03H9/00; H03H9/46; G; G11; G11B; G11B20/00; G11B20/10; G11B20/10009

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 163 words
An error compensation circuit for compensating for a parameter error of an IC (Integrated Circuit) chip having a filter (30) for filtering a read signal input, comprising: a level detector (51-53) for detecting a level of a signal output from said filter (30); a level comparator (55) for comparing an output level of said level detector (51-53) with a reference signal level (54); an integrator (56) for integrating an output of said level comparator (55) to generate a frequency error signal; a data storage (70) for converting said frequency error signal into digital data, storing the digital data, converting the stored digital data into an analog frequency compensation signal in a normal signal processing mode, and providing said frequency compensation signal to the filter (30); and a switch (SW) with a common end connected to the filter (30), for switching the common end to the reference signal in an error compensation mode and to a read signal in the normal signal processing mode.
Claim 2
Dependent Claim 131 words
An error compensation circuit for compensating for a parameter error of an IC chip having a boost circuit (40) for boosting up an input signal of a given frequency with a predetermined gain said error compensation circuit, comprising: a level detector for detecting a level of a signal output from said boost circuit; a level comparator for comparing an output level of said level detector with a reference signal level; an integrator for integrating an output of said level comparator to generate a boost error signal; and a data storage (70) for converting said boost error signal into digital data, storing the digital data, converting the stored digital data into an analog boost compensation signal in a normal signal processing mode, and providing said boost compensation signal to the boost circuit.
Claim 3
Dependent Claim 68 words
The error compensation circuit as claimed in claim 1 or 2, wherein said level detector comprises: a peak detector (51) for detecting a peak value of the signal output from the filter (30); a bottom detector (52) for detecting a bottom value of the signal output from the filter (30); and a differential amplifier (53) for amplifying a level difference between the peak value and the bottom value.
Claim 4
Dependent Claim 294 words
An error compensation circuit for compensating for parameter errors of an IC chip having a filter for filtering a read signal input and a boost circuit for boosting up a signal output from the filter with a predetermined gain, comprising: a frequency compensation circuit including; a first level detector (51-53) for detecting a level of a signal output from said filter; a first level comparator (55) for comparing an output level of said first level detector (51-53) with a reference signal level (54); a first integrator (56) for integrating an output of said first level comparator (55) to generate a frequency error signal; a first data storage (72a, 74a, 76a) for converting said frequency error signal into digital data, storing the digital data, converting the stored digital data into an analog frequency compensation signal in a normal signal processing mode, and providing said frequency compensation signal to the filter (30); a boost compensation circuit including: a second level detector for detecting a level of a signal output from said boost circuit; a second level comparator for comparing an output level of said second level detector with said reference signal level; a second integrator for integrating an output of said second level comparator to generate a boosting error signal; a second data storage (72b, 74b, 76b) for converting said boosting error signal into digital data, storing the digital data, converting the stored digital data into an analog boost compensation signal in the normal signal processing mode, and providing said boost compensation signal to the boost circuit (40); and a switch (SW) with a common end connected to the filter (30), for switching the common end to the reference signal in an error compensation mode and to the read signal in the normal signal processing mode.
Claim 5
Dependent Claim 27 words
The error compensation circuit as claimed in claim 4, further comprising a reference signal level detector for detecting the reference signal level in the error compensation mode.

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