EP0876075A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Fibre channel switching system and method

Assignee: Brocade Communications Systems LLC

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Filing: 1998-02-16

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Granted: —

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Expires: 2018-02-16

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Abstract

Abstract A modular Fibre Channel switch (100) includes a data switching path (109) and a message switching path (102) to provide logical point to point connections between switch ports. The data switching path (102) includes a bank of shared SRAM memory devices that are accessed in a time-sliced protocol by each switch port. A receiving switch port writes a data frame to the bank of shared SRAM and the transmitting switch port then reads the data frame from the shared SRAM thereby effecting the logical point to point connection. Because the switch port includes a frame logic circuit that allows for an arbitrary start of frame address, each frame can be written to the first available DRAM device thus eliminating the need to buffer the data frame while waiting for a predetermined DRAM device to cycle in the time sliced protocol. The message switching path includes a message crossbar switch that is barrel shifted in a time sliced fashion to effect message passing among the switch ports. The switch includes a motherboard containing an embedded G_Port ASIC (111), a message crossbar switch to handle message passing and shared memory that is used to perform data switching. The switch also includes a central processing unit daughter board and external switch port daughter boards.

Inventors

👤 David C. Banks
👤 Steven L. Farnworth
👤 Bent Stoevhase
👤 Paul Ramsay

Bibliographic Details

Application Number —

Jurisdiction EP

Data Source google_patents

Last Synchronized 2026-11-05 15:54

CPC Classifications

H; H04; H04L; H04L49/00; H04L49/35; H04L49/356; H04L49/357; H04L12/00; H04L12/28; H04L12/40; H04L12/407; H04L12/413; H04L49/10; H04L49/101; H04L49/20; H04L49/201; H04L49/205; H04L49/25; H04L49/253; H04L49/254; H04L49/351

Claims Analysis

Total Claims: 8

Claim 1

Independent Claim 80 words

A method of switching data frames, each data frame having a frame beginning, in a network having a plurality of ports and a central memory including a plurality of memory modules, the method comprising: receiving data frame at a first port; determining a destination port; striping the data frame across a plurality of memory modules in the central memory; generating a message indicating which memory module stores the beginning of the frame; and sending the message to the destination port.

Claim 2

Dependent Claim 34 words

The method of claim 1 wherein striping the data frame across a plurality of memory modules in the central memory includes writing the beginning of the data frame to a next available memory module.

Claim 3

Dependent Claim 45 words

The method of claim 1 further comprising: receiving the message; determining which memory module stores the beginning of the frame; and reading the data frame from central memory starting in the next time slot corresponding to the memory module storing the beginning of the frame.

Claim 4

Dependent Claim 28 words

The method of claim 1 further comprising sequentially coupling each port to every other port to generate time slotted message paths from each port to every other port.

Claim 5

Dependent Claim 97 words

A network switching system having a plurality of ports for switching data from a first port to a second port, comprising: a message path including: a crossbar switch having a plurality of connectivity states coupled to each port; and a message controller coupled to each port and to the crossbar switch to control access to the crossbar switch; and a data path including: a central memory including a plurality of memory modules coupled to each port; and a memory access controller coupled to each port for controlling access of the plurality of memory modules by the ports.

Claim 6

Dependent Claim 74 words

The system of claim 5 wherein the memory access controller includes: a counting circuit having a count output and a control input; an index pulse generator having a pulsed output coupled to the control input of the counter; a register storing a port number; and a processing circuit having a first input coupled to the counting circuit and a second input coupled to the register and having an output indicating a memory module offset.

Claim 7

Dependent Claim 59 words

The system of claim 5 wherein message controller includes: a counting circuit having a count output and a control input; an index pulse generator having a pulsed output coupled to the control input of the counter; a processing circuit having a first input coupled to the counting circuit and an output indicating the connectivity state of the crossbar switch.

Claim 8

Independent Claim 112 words

A method of switching data frames in a network having a plurality of ports and a central memory including a plurality of memory modules, comprising: assigning a time slot to each port for access to each memory module; receiving a data frame at a plurality of ports; and for each received data frame: dividing the data frame into sub-portions including a first sub-portion; writing the first sub-portion to a memory module during the next occurring memory access time slot; writing the remaining frame sub-portions to the central memory, said writings occurring during the time slots assigned to the port; determining a destination port; and sending a read request to the destination port.

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