EP0856884A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Low temperature via and trench fill process by means of CVD of Cu followed by PVD of Cu
Assignee: Applied Materials Inc
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Filing: 1998-01-27
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Granted: —
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Expires: 2018-01-27
Abstract
Abstract The disclosure relates to a process for providing complete via a trench fill on a substrate.The planarization of Cu layers forms continuous, void-free contacts or vias in sub-half micrometer applications. A refractory layer (12) is deposited onto a substrate having high aspect ratio contacts or vias (14) formed thereon. A CVD Cu layer (22) is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD Cu. Next, a PVD Cu (23) is deposited onto the previously formed CVD Cu layer at a temperature below that of the melting point temperature of Cu. The resulting CVD/PVD Cu layer is substantially void-free. The metallization process is preferably carried out in an integrated processing system that includes both a PVD and CVD processing chamber so that once the substrate is introduced into a vacuum environment, the metallization of the vias and contacts occurs without the formation of an oxide layer over the CVD Cu layer. The via fill process of the present invention is also successful with air-exposure between the CVD Cu and PVD Cu steps.
Inventors
- 👤 Liang-Yuh Chen
- 👤 Roderick Craig Mosely
- 👤 Fusen Chen
- 👤 Rong Tao
- 👤 Ted Guo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 03:33
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10P; H10P14/00; H10P14/40; H10P14/42; H10P14/43; H10P14/44; H10W20/032; H10W20/033
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
103 words
A method of forming a feature on a
substrate, comprising the steps of: (a) sputtering a barrier/wetting layer over
the surface of an aperture, the barrier/wetting having
a thickness of between about 5 and about 700
Angstroms; (b) chemical vapor depositing copper over
the surface of the barrier/wetting layer without
capping the via, the chemical vapor deposited copper
having a thickness greater between about 200 Angstroms
and about 1 micron; (c) physical vapor depositing copper over
the chemical vapor deposited copper at a temperature
below about 660ºC to cause the CVD and PVD copper to
flow into the via without voids forming therein.
Claim 2
Dependent Claim
22 words
A method as claimed in claim 1, wherein the
barrier/wetting layer has a thickness of between about
100 and about 200 Angstroms.
Claim 3
Dependent Claim
24 words
A method as claimed in claim 1 or claim 2,
wherein the physical vapor deposition of copper occurs
at a temperature below about 400ºC.
Claim 4
Independent Claim
30 words
A method as claimed in any of claims 1 to 3,
wherein the steps (a) through (c) are performed
sequentially in an integrated processing system with a
common vacuum mainframe.
Claim 5
Independent Claim
22 words
A method as claimed in any of claims 1 to 3,
wherein the steps (a) through (c) are performed in
separate chambers.
Claim 6
Independent Claim
26 words
A method as claimed in any of claims 1 to 5,
wherein the resistance of the feature is not increased
by exposure to air between steps.
Claim 7
Independent Claim
29 words
A method as claimed in any of claims 1 to 6,
further comprising the step of : (d) exposing the substrate to oxygen
between said steps (b) and (c).
Claim 8
Independent Claim
37 words
A method as claimed in any of claims 1 to 7,
wherein the physical vapor deposited copper includes
tin, the method further comprising the step of
annealing at a temperature of between about 250ºC and
about 450ºC.
Claim 9
Dependent Claim
52 words
A process for filling a via, trench or dual
damascene structure on a substrate, comprising the
steps of : a) forming a thin barrier/wetting layer on
the substrate; b) forming a thin conformal CVD Cu layer
over the barrier/wetting layer; and c) forming a PCD Cu layer over the CVD Cu
layer.
Claim 10
Dependent Claim
20 words
A process as claimed in claim 9, wherein the
CVD Cu layer has a thickness less than about 5000
Angstroms.
Claim 11
Dependent Claim
20 words
A process as claimed in claim 10, wherein
the barrier/wetting metal layer has a thickness less
than about 2000 Angstroms.
Claim 12
Dependent Claim
17 words
A process as claimed in claim 9 or claim 10,
wherein the barrier/wetting metal layer is tantalum.
Claim 13
Dependent Claim
47 words
A process as claimed in any of claims 9 to
11, wherein the barrier/wetting metal layer is
selected from the group consisting of tungsten (W),
niobium (Nb), aluminum silicates, tantalum (Ta),
tantalum nitride (TaN), titanium nitride (TiN), PVD
Ti/N 2 -stuffed, TiSiN, WSiN, or a combination thereof.
Claim 14
Dependent Claim
24 words
A process as claimed in any of claims 9 to
13, wherein the PVD Cu layer is deposited at a
temperature less than 400ºC.
Claim 15
Dependent Claim
22 words
A process as claimed in any of claims 9 to
14, wherein the CVD Cu is deposited at a temperature
below 400ºC.
Claim 16
Dependent Claim
26 words
A process as claimed in any of claims 9 to
15, wherein the CVD and PVD Cu layers integrate to
form a single conformal metal layer.
Claim 17
Dependent Claim
129 words
A semiconductor wafer comprising: a) a metal feature disposed on the
semiconductor wafer; b) a dielectric layer disposed over the
metal feature, the dielectric layer having an aperture
formed therethrough to communicate with the metal
feature; c) a barrier/wetting layer having a
thickness of between about 5 and about 700 Angstroms
disposed over the surface of the aperture; d) a chemical vapor deposited copper layer
disposed over the barrier/wetting layer, the chemical
vapor deposited copper having a thickness between
about 200 Angstroms and about 1 micron; e) a physical vapor deposited copper
disposed over the chemical vapor deposited copper,
wherein the physical vapor deposited copper is
deposited at a temperature below about 400ºC to cause
the CVD and PVD copper to flow into the via without
voids forming therein.
Claim 18
Independent Claim
53 words
A method of forming a semiconductor device
on a substrate, comprising the steps of: (a) depositing a first copper layer on the
substrate in a first vacuum chamber; (b) transporting the substrate through an
oxygen containing atmosphere to a second vacuum
chamber; (c) depositing a second copper layer over
the first copper layer.
Claim 19
Dependent Claim
19 words
A method as claimed in claim 18, wherein no
oxides are formed between the first and second copper
layers.
References Cited (Backward Citations)
No citation records indexed.
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