EP0851474A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Improvements in or relating to integrated circuits
Assignee: Texas Instruments Inc
•
Filing: 1997-12-12
•
Granted: —
•
Expires: 2017-12-12
Abstract
Abstract An integrated circuit fabrication process in which residual flourine contamination on metal surfaces after ashing is removed by exposure to an NH 3 /O 2 plasma.
Inventors
- 👤 Robert M. Wallace
- 👤 S. Charles Baber
- 👤 Peijun Chen
- 👤 Steven A. Henck
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 13:14
CPC Classifications
H; H10; H10P; H10P70/00; H10P70/20; H10P70/27; H10P70/23; H10P70/234; H10P70/273; H10P95/00; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
51 words
A deflouridation process, comprising the steps of: providing a layer of conductive material having flourides
and/or oxyflourides on a surface thereof; and removing said flourides and said oxyflourides from the
surface of said layer of conductive material, using a
flourine-scavenging chemistry to thereby improve adhesion for
subsequently deposited layers is achieved.
Claim 2
Dependent Claim
20 words
The process of Claim 1, further comprising the step of,
after said step of removing, depositing an overlying conductor
layer.
Claim 3
Dependent Claim
19 words
The process of Claim 1 or Claim 2, wherein said step of
removing comprises using an NH 3 plasma.
Claim 4
Dependent Claim
20 words
The process of Claim 1 or claim 2, wherein said step of
removing comprises using NH 4 OH wet chemistry.
Claim 5
Dependent Claim
18 words
The process of Claim 1, wherein said step of providing
said layer of conductive material comprises providing
aluminum.
Claim 6
Dependent Claim
52 words
A deflouridation process for fabricating integrated
circuit structures, comprising the steps of: forming a layer of conductive material; performing an etching step which leaves residual flourine
on a surface of said layer of conductive material; and removing said residual flourine with an amine chemistry
to thereby improve adhesion for subsequently deposited layers.
Claim 7
Dependent Claim
19 words
The process of Claim 6, further comprising the step,
after said step of removing, depositing an overlying conductor
layer.
Claim 8
Dependent Claim
18 words
The process of Claim 6 or Claim 7, wherein said step of
removing comprises using a plasma-activated chemistry.
Claim 9
Dependent Claim
20 words
The process of Claim 6 or Claim 7, wherein said step of
removing comprises using NH 4 OH wet chemistry.
Claim 10
Dependent Claim
20 words
The process of Claim 6 or Claim 7, wherein said step of
removing comprises using as non-aqueous amine wet chemistry.
Claim 11
Dependent Claim
19 words
The process of any of Claims 6 to 10, further comprising:
performing said step of removing at room temperature.
Claim 12
Dependent Claim
23 words
The process of any of Claims 6 to 11, wherein said
etching step comprises using an oxyflourine ashing technique
for removing said photoresist.
Claim 13
Dependent Claim
71 words
An integrated circuit fabrication process, comprising the
steps of: forming at least one interlevel dielectric layer over an
underlying structure; patterning and etching said dielectric layer to form
holes in contact locations, wherein said step of etching
leaves residual flourine on the surface of said dielectric
layer and said underlying structures; and removing said residual flourine by reacting with a
plasma-activated flourine-scavenging chemistry to thereby
improve adhesion for subsequently deposited layers.
Claim 14
Dependent Claim
20 words
The process of Claim 13, further comprising the step,
after said step of removing, of depositing an overlying
conductor layer.
Claim 15
Dependent Claim
19 words
The process of Claim 13 or Claim 14, wherein said step of
removing comprises using an NH 3 plasma.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.