Signal processing method and circuit for format conversion of picture signal

Claim 2

The circuit of claim 1, wherein the scanning converter comprises: a first converter for converting the input picture signal into a transmission scanning line signal transmitted in interlace scanning and an interpolation scanning line signal formed by interpolating scanning lines skipped in interlace scanning when the input picture signal is of interlace scanning; and a multiple-scan converter for multiplexing the transmission scanning line signal and the interpolation scanning line signal to form a progressive scanning signal by a fifth local signal processing of time-division multiplex with a compression of the time axis by 1/2.

Claim 3

The circuit of claim 2, wherein the first converter comprises: a motion detector for detecting a picture motion coefficient of the input picture signal; a circuit for constituting first and second interpolation signals by performing an intrafield calculation and an interfield calculation, respectively, on the input picture signal; and a circuit for providing the interpolation scanning line signal by varying the mixture ratio of the first and second interpolation signals by the motion coefficient.

Claim 4

The circuit of claim 1, wherein the horizontal scaling unit comprises: a low pass filter for removing aliasing noise from the input signal to the horizontal scaling unit; a 1-horizontal scanning line memory; a first switch for selecting the output signal of the 1-horizontal scanning line memory or the output signal of the low pass filter; a calculation unit for delaying the output signal of the first switch by one picture element period, forming a first signal by multiplying the delayed signal by a coefficient β (1 > β ≥ 0), forming a second signal by multiplying the output signal of the first switch by a coefficient 1-β, and adding the first and second signals; a second switch for selecting either the input signal to the horizontal scaling unit or the output signal of the calculation unit, and inputting the selected signal to the 1-horizontal scanning line memory; a third switch for selecting the output signal of the 1-horizontal scanning line memory or the output signal of the calculation unit; and a fourth switch for selecting the output signal of the third switch or the input signal to the horizontal scaling unit; wherein signal processing by compression in a horizontal direction, expansion in a horizontal direction or through processing is selectively performed by selective control of the switches.

Claim 5

The circuit of claim 1, wherein the vertical scaling unit comprises: a low pass filter for removing aliasing noise from the input signal to the vertical scaling unit; a first field memory; a first switch for selecting an output signal read from the first field memory or the output signal of the low pass filter; a calculation unit for forming a first signal by delaying the output signal of the first switch by one line period and multiplying the delayed output signal by a coefficient β (1 > β ≥ 0), forming a second signal by multiplying the output signal of the first switch by a coefficient 1-β, and adding the first and second signals; a second switch for selecting the input signal to the vertical scaling unit or the output signal of the calculation unit, and inputting the selected signal to the first field memory; a second field memory for delaying the output signal of the calculation unit; a third switch for selecting the signals outputted by the calculation unit, an output signal read from the first field memory or an output signal read from the second field memory; and a fourth switch for selecting the output signal of the third switch or the input signal to the vertical scaling unit; wherein signal processing by compression in a vertical direction, expansion in a vertical direction, through processing, field multiple-scanning or PAL-NTSC system conversion is selectively performed by selective control of the switches.

Claim 6

The circuit of claim 1, wherein the horizontal scaling unit and the vertical scaling unit comprise circuits for performing the second local signal processing of compression in a horizontal direction and expansion in a horizontal direction, and the third local signal processing of compression in a vertical direction and expansion in a vertical direction, respectively, by linear interpolation.

Claim 7

The circuit of claim 1, wherein a picture quality improving unit controlled by the control unit is connected to an output terminal of the scaling unit for performing signal processing by colour space conversion and/or inverse gamma conversion on the output signal of the scaling unit.

Claim 8

The circuit of claim 7, wherein a multiplex unit controlled by the control unit is connected to an output terminal of the picture quality improving unit for multiplexing another display picture signal with the output signal of the picture quality improving unit.

Claim 9

The circuit of claim 1, further comprising: a colour signal multiplex unit for multiplexing two colour difference signals of the input picture signal to form a time-division multiplex signal; wherein the time-division multiplex signal outputted by the colour multiplex unit is inputted to the scanning converter and the first selector.

Claim 10

The circuit of claim 1, further comprising: a multi-processing unit for inputting first and second picture signals having the same format and for performing fourth local signal processing of multiplexing the first and second picture signals to form a time-division multiplex signal during one scanning line period; and a second selector for constituting the input picture signal by selecting the first picture signal or the time-division multiplex signal outputted by the multi-processing unit; wherein the control unit is constituted to have the scanning converter, the first selector and the scaling unit perform the signal processing on the first picture signal in case of one window display, and on the time-division multiplex signal outputted by the multi-processing unit in case of double windows.

Claim 11

The circuit of claim 10, wherein the multi-processing unit comprises: a first filter for removing aliasing noise from the first picture signal; a first sampling unit for sub-sampling the output signal of the filter; a fourth selector for selecting the output signal of the first sampling unit or the first picture signal; a first line memory connected to an output terminal of the fourth selector; a second filter for removing aliasing noise from the second picture signal; a second sampling unit for sub-sampling the output signal of the second filter; a fifth selector for selecting the output signal of the second sampling unit or the second picture signal; a second line memory connected to an output terminal of the fifth selector; and a multiplex unit for multiplexing the output signal of the first line memory with the output signal of the second line memory to form a time-division multiplex signal.

Claim 12

The circuit of claim 10, wherein the scanning converter comprises: a first converter for converting the input picture signal into a transmission scanning line signal transmitted in interlace scanning and an interpolation scanning line signal formed by interpolating scanning lines skipped in interlace scanning when the input picture signal is of interlace scanning; and a multiple-scan converter for multiplexing the transmission scanning line signal and the interpolation scanning line signal to a progressive scanning signal by a fifth local signal processing of time-division multiplex with a compression of the time axis by 1/2.

Claim 13

A signal processing circuit for converting the format of an input picture signal into a predetermined display format of a picture output device, said circuit comprising: a first converter for converting the input picture signal into a transmission scanning line signal transmitted in interlace scanning and an interpolation scanning line signal formed by interpolating scanning lines skipped in interlace scanning when the input picture signal is of interlace scanning; a second converter for converting the input picture signal into a transmission scanning line signal transmitted in interlace scanning and an interpolation scanning line signal formed by interpolating scanning lines skipped in interlace scanning when the input picture signal is of progressive scanning; a third selector for selecting a set of the transmission scanning line signal and the interpolation scanning line signal outputted by the first converter or a set of the transmission scanning line signal and the interpolation scanning line signal outputted by the second converter; a scaling unit comprising a horizontal scaling unit for performing a second local signal processing of compression in a horizontal direction and expansion in a horizontal direction on each signal selected by the third selector and a vertical scaling unit for performing a third local signal processing of compression in a vertical direction and expansion in a direction vertical thereto; a multiple-scan converter for converting signals outputting from the scaling unit into a progressive scanning signal by a fifth local signal processing of time-division multiplex with compression of the time axis by 1/2; and a control unit for selecting signal processing parameters in accordance with the format of the input picture signal and the predetermined display format of the picture output device, and controlling at least the first converter, the second converter, the third selector, the scaling unit and the multiple-scan converter in accordance with the parameters.

Claim 14

The circuit of any one of claims 1, 10 and 13, wherein the horizontal scaling unit comprises a calculation unit for multiplying a plurality of picture elements by coefficient values, a line memory and a plurality of switches, wherein a signal processing by compression in a horizontal direction, expansion in a horizontal direction or through processing is selectively performed by selective control of the switches.

Claim 15

The circuit of any one of claims 1, 10 and 13, wherein the vertical scaling unit comprises a calculation unit for multiplying picture elements in a plurality of lines by coefficient values, field memories and a plurality of switches, wherein a signal processing by compression in a vertical direction, expansion in a vertical direction or through processing is selectively performed by selective control of the switches.

Claim 16

The circuit of any one of claims 1, 10 and 13, wherein the horizontal scaling unit is a circuit for performing only the signal processing by compression in a horizontal direction and through processing, and the vertical scaling unit is a circuit for performing the third local signal processing on the output signal of the horizontal scaling unit.

Claim 17

The circuit of any one of claims 1, 10 and 13, wherein the horizontal scaling unit is a circuit for performing only the signal processing of expansion in a horizontal direction and through processing on the output signal of the vertical scaling unit.

Claim 18

A television receiver comprising: the signal processing circuit of any preceding claim; and a picture output device for displaying the picture of the output signal of the signal processing circuit.

Claim 19

A signal processing method for converting the format of an input picture signal into a predetermined display format of a picture output device, comprising the steps of: providing a progressive scanning picture signal directly from the input picture signal when the input picture signal is of progressive scanning and providing a progressive scanning picture signal by converting the input picture signal into a progressive scanning picture signal when the input picture signal is of interlace scanning; and performing a scaling operation of compression in a horizontal direction, expansion in a horizontal direction, compression in a vertical direction, expansion in a vertical direction and/or frame rate conversion on the provided progressive scanning picture signal in accordance with the format of the input picture signal and the predetermined display format of the picture output device.

Claim 20

The method of claim 15, wherein the compression in the horizontal direction, the expansion in the horizontal direction, the compression in the vertical direction, and the expansion in the vertical direction are performed by linear interpolation with multiplying coefficients on signals of a pair of picture elements contiguously arranged in the horizontal direction and in the vertical direction, respectively, and adding the products thereof.

Claim 21

The method of claim 19, wherein signal processing by colour space conversion and/or inverse gamma conversion is performed on a picture signal which has been subjected to the scaling operation.

Claim 22

The method of claim 19, wherein the input picture signal is a 4:2:2 or 4:2:0 component signal comprising a luminance signal and colour difference signals.

Claim 23

The method of claim 19, comprising the further steps of: performing signal processing of multiplexing first and second picture signals having the same format on a time-division multiplex signal during one scanning line period; and constituting the input picture signal by selecting the first picture signal or the time-division multiplex signal.

Claim 24

The method of claim 19 or 23, wherein, in performing the scaling operation, when the scaling operation of compression in the horizontal direction is performed, the scaling operation of compression in the vertical direction or expansion in the vertical direction is performed after the scaling operation in the horizontal direction, and when the scaling operation of expansion in the horizontal direction is performed, the scaling operation of expansion in the horizontal direction is performed after the scaling operation of compression in the vertical direction or expansion in the vertical direction.