EP0780771A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Peripheral control subsystem for video game system
Assignee: Nintendo Co Ltd
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Filing: 1996-11-21
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Granted: —
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Expires: 2016-11-21
Abstract
Abstract A video game system includes a game cartridge which is pluggably attached to a main console having a main processor, a 3D graphics generating coprocessor, expandable main memory and player controllers. A multifunctional peripheral processing subsystem external to the game microprocessor and coprocessor is described which executes commands for handling player controller input/output to thereby lessen the processing burden on the graphics processing subsystem. The player controller processing subsystem is used for both controlling player controller input/output processing and for performing game authenticating security checks continuously during game play. The peripheral interface includes a micro-processor for controlling various peripheral interface functions, a read/write random access memory, a boot ROM, a coprocessor command channel interface, a player controller channel interface, etc., which components interact to efficiently process player controller commands while also performing other important functions without requiring significant main processor processing time. A peripheral interface macro may be executed to start a read or write transaction with each peripheral device and thereafter transfer the transaction results stored in the random access memory to the game microprocessor main memory.
Inventors
- 👤 Genyo c/o Nintendo Co. Ltd. Takeda
- 👤 Syuhei c/o Nintendo Co. Ltd. Kato
- 👤 Satoshi C/O Nintendo Co. Ltd. Nishiumi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 22:58
CPC Classifications
A; A63; A63F; A63F13/00; A63F13/45; A63F13/49; A63F13/493; A63F13/50; A63F13/52; A63F13/525; A63F13/5255; A63F13/70; A63F13/73; A63F13/90; A63F13/95; G; G06; G06F; G06F21/00; G06F21/30; G06F21/31; G06F21/50; G06F21/51; G06F21/70; G06F21/78; G06F21/79; G06F21/82; G06F21/85; G06F3/00; G06F3/01; G06F3/03; G06F3/033; G06F3/038; G06F3/0383; G06T; G06T15/00; G06T15/10; A63F2300/00; A63F2300/20; A63F2300/201; A63F2300/206; A63F2300/60; A63F2300/63; A63F2300/636; A63F2300/64; A63F2300/66; A63F2300/6661; A63F2300/6676; A63F2300/80; A63F2300/807; G06F2203/00; G06F2203/038; G06F2203/0382; G06F2221/00; G06F2221/21; G06F2221/2109
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
161 words
For use with a video game system console having a game program executing processing system including a game microprocessor and a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program and at least one player controller operable by a player to generate video game control signals, and a player controller processor subsystem, coupled to said coprocessor; a portable storage device for controlling the operation of said video game system console comprising: a memory media for storing video game instructions and graphics and sound data; means for coupling said video game instructions and said graphics and sound data retrieved from said memory media to said video game system console; said video game instructions including at least one player controller instruction for causing said game program executing processing system to send a command to said player controller processor subsystem to execute said command to initiate an operation relating to said video game control signals.
Claim 2
Dependent Claim
17 words
A portable storage device in accordance with claim 1, wherein said command is a multi-byte read command.
Claim 3
Dependent Claim
17 words
A portable storage device in accordance with claim 1, wherein said command is a multi-byte write command.
Claim 4
Dependent Claim
42 words
A portable storage device in accordance with claim 2, wherein said player controller peripheral processing system includes a random access memory for storing player controller related data, and wherein said multi-byte read command is used to read from said random access memory.
Claim 5
Dependent Claim
32 words
A portable storage device in accordance with claim 2, wherein said peripheral processing system includes a boot ROM and wherein said multi-byte read command is used to read from said boot ROM.
Claim 6
Dependent Claim
182 words
For use with a video game system console having a game program executing processing system including a game microprocessor and a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program and at least one player controller operable by a player to generate video game control signals, and a player controller processor subsystem, coupled to said coprocessor; a portable storage device for controlling the operation of said video game system console comprising: a memory media for storing video game instructions and graphics and sound data; means for coupling said video game instructions and said graphics and sound data retrieved from said memory media to said video game system console; said video game instructions including at least one player controller instruction for causing said game program executing system to send a command to said player controller processor subsystem to cause the player controller processor subsystem 1) to initiate a data transaction between the player controller processor subsystem and at least one player controller and 2) to forward video game related control signals to said coprocessor.
Claim 7
Dependent Claim
156 words
For use in a video game system having an external memory for storing a video game program, a game program executing processing system having a game microprocessor and a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program, at least one player controller operable by a player for generating video game control signals, said game program executing processing system being operable to generate at least one player controller related command requesting an operation be performed relating to said video game control signals generated by said at least one player controller; a peripheral processing subsystem comprising: a first interface circuit, coupled to said coprocessor, and operable to receive and process said player controller related command; a read write memory; and a second interface for receiving video game control data from said at least one player controller and for loading said video game control data in said read/Write memory.
Claim 8
Dependent Claim
112 words
A peripheral processing subsystem according to claim 7, wherein said first interface circuit includes a shift register for receiving a player controller related command, processing circuitry for decoding said player controller related command to identify a controller related operation to be performed with said video game control signals and for controlling the performance of said controller related operation, and means for transmitting a response to said player controller command to said coprocessor, and wherein said second interface circuit includes at least one register, a buffer storage device coupled to said register and a serial to parallel converter, coupled to said buffer storage device, for receiving data from at least one player controller.
Claim 9
Dependent Claim
165 words
For use in a video game system having an external memory for storing a video game program, a game program executing processing system having a game microprocessor and a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program, at least one player controller operable by a player for generating player controller related data, said game program executing processing system being operable to generate at least one player controller related command requesting an operation be performed relating to said player controller related data generated by said at least one player controller; a peripheral subsystem comprising: a shift register, coupled to said coprocessor, for receiving a player controller related command; processing circuitry for decoding said player controller related command to identify a controller related operation to be performed with said player controller related data and for controlling the performance of said controller related command; and means for transmitting a response to said player controller command to said coprocessor.
Claim 10
Dependent Claim
19 words
A peripheral subsystem according to claim 9, further including a random access memory for storing player controller related data.
Claim 11
Dependent Claim
18 words
A peripheral subsystem according to claim 9, wherein said processing circuitry includes a microprocessor and an interface controller.
Claim 12
Dependent Claim
47 words
A peripheral subsystem according to claim 11, further including a random access memory for storing player controller related data from said at least one player controller, wherein said interface controller controls the reading and writing of player controller related data from and to said random access memory.
Claim 13
Dependent Claim
60 words
A peripheral subsystem according to claim 9, further including a boot ROM for storing instructions to be executed prior to instructions being executed which are stored in said external memory, and wherein said processing circuitry is operable to access a boot ROM instruction and couple said instruction to said coprocessor upon decoding a command for reading from said boot ROM.
Claim 14
Dependent Claim
24 words
A peripheral subsystem according to claim 13, wherein said boot ROM instruction is accessed from said boot ROM and coupled to said shift register.
Claim 15
Dependent Claim
50 words
A peripheral subsystem according to claim 9, further including a serial bus coupled to said shift register for serially providing said player controller command to said shift register, a timing bus coupled to said shift register for providing timing signals for clocking said player controller command into said shift register.
Claim 16
Dependent Claim
19 words
A peripheral subsystem according to claim 9, wherein said shift register is operable as a serial to parallel converter.
Claim 17
Dependent Claim
200 words
For use in a video game system having an external memory for storing a video game program, a game program executing processing system having a game microprocessor and a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program, at least one player controller operable by a player for generating player controller related data, said game program executing processing system being operable to generate at least one player controller related command requesting an operation be performed relating to said player controller related data generated by said at least one player controller; a peripheral subsystem comprising; a register, coupled to said coprocessor, for receiving a command from said coprocessor; a random access memory for storing player controller related data received from said at least one player controller; a boot ROM for storing instructions to be executed prior to instructions being executed which are stored in said external memory, processing circuitry for decoding said command to identify an operation to be performed and for controlling the performance of said operation; and means for accessing information from one of said random access memory and said boot ROM in response to the decoding of said command.
Claim 18
Dependent Claim
36 words
A peripheral subsystem according to claim 17, further including a player controller input interface controller for receiving player controller data from said player controllers and for transferring said player controller data to said random access memory.
Claim 19
Dependent Claim
33 words
A peripheral subsystem according to claim 18, further including at least one register, a buffer storage device coupled to said register and a serial to parallel converter coupled to said buffer storage device.
Claim 20
Dependent Claim
139 words
For use with a video game system console having a game microprocessor for executing a video game program stored in an external memory, and a coprocessor coupled to said game microprocessor to execute said video game program, and at least one player controller operable by a player to generate player controller related data; a player controller processor subsystem comprising: a first interface circuit for receiving a player controller related command from said coprocessor; a random access memory for storing player controller related data; and processing circuitry, responsive to a predetermined player controller related command 1) for retrieving data from a player controller and loading such player controller data into said random access memory, and 2) for reading such retrieved data from said random access data and forwarding said data to said first interface circuit for transmission to said coprocessor.
Claim 21
Dependent Claim
43 words
A peripheral subsystem according to claim 20, further including a second interface circuit for temporarily storing player controller data received from said player controller and for coupling said temporarily stored data to said random access memory under the control of said processing circuitry.
Claim 22
Dependent Claim
158 words
For use in a video game system having an external memory for storing a video game program, a game microprocessor for executing said video game program, at least one player controller operable by a player for generating video game control signals, a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program, said coprocessor being operable to generate at least one player controller related command requesting an operation be performed relating to said video game control signals generated by said at least one player controller; a peripheral processing subsystem comprising: at least one memory device for storing a first set of instructions for controlling the performance of said operation relating to said video game control signals identified by said player controller related command, and a second set of instructions for authenticating said external memory; and a microprocessor for executing said first set of instructions and said second set of instructions.
Claim 23
Dependent Claim
125 words
A video game system comprising: an external memory for storing a video game program; a game microprocessor for executing said video game program; at least one player controller operable by a player for generating video game control signals; a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program, said coprocessor being operable to communicate at least one player controller related command requesting an operation be performed relating to said video game control signals generated by said at least one player controller; and a peripheral processing subsystem, coupled to said coprocessor, and operable to receive said player controller related command and for executing said command to thereby perform said operation relating to said video game control signals.
Claim 24
Dependent Claim
149 words
For use with a video game system console having a game microprocessor for executing a video game program and a coprocessor, coupled to said game microprocessor, for cooperating with said game microprocessor to execute said video game program, at least one player controller operable by a player to generate video game control signals, and a player controller processor subsystem, coupled to said coprocessor; a portable storage device for controlling the operation of said video game system console comprising: a memory media for storing video game instructions and graphics and sound data; a multiplexed bus, coupled in use to said coprocessor, for transmitting address signals in parallel to said memory media and for receiving information accessed from said memory media; addressing logic circuitry for gating address signals received from said bus to address said memory media; readout circuitry for coupling information readout of said memory media to said multiplexed bus.
Claim 25
Dependent Claim
32 words
A portable storage device in accordance with claim 24, wherein the signals transmitted across said multiplexed bus have a plurality of timing parameters and at least some of the parameters are programmable.
Claim 26
Dependent Claim
68 words
A portable storage device in accordance with claim 24, wherein said memory media occupies a first address domain in the address space of said game microprocessor and wherein the signals transmitted across said multiplexed bus have a plurality of timing parameters and at least some of the timing parameters are programmable based upon said media being located in said first address domain instead of a second address domain.
Claim 27
Dependent Claim
23 words
A portable storage device in accordance with claim 24, wherein said multiplexed bus further includes at least one address latching enable control line.
Claim 28
Dependent Claim
41 words
A portable storage device in accordance with claim 27, further including at least one register for receiving address information transmitted over said multiplexed bus in response to a control signal transmitted over said at least one address latching enable control line.
Claim 29
Dependent Claim
42 words
A portable storage device in accordance with claim 24, wherein said video game console includes a'video digital to analog converter which generates a composite synchronization signal and wherein said portable storage device includes an input terminal for receiving said composite synchronization signal.
Claim 30
Dependent Claim
21 words
A portable storage device in accordance with claim 24, wherein said portable storage device includes at least one interrupt related terminal.
Claim 31
Dependent Claim
190 words
For use with a video game system console having a game microprocessor for executing a video game program and a coprocessor coupled to said game microprocessor for cooperating with said game microprocessor to execute said video game program; a portable storage device for controlling the operation of said video game system console comprising: a memory media for storing video game instructions and graphics and sound data; a multiplexed bus, coupled in use to said coprocessor, for transmitting address signals in parallel to said memory media and for receiving information accessed from said memory media; addressing logic circuitry for gating address signals received from said bus to address said memory media; a decoding circuit for receiving a predetermined set of said address signals and for generating a memory media readout enable related signal if said memory media is determined to be in a predetermined portion of the address space of said game microprocessor; and readout circuitry, responsive to said memory media enable related signal, for reading information out of a memory media location identified by said address signals and for coupling information readout of said memory media to said multiplexed bus.
Claim 32
Dependent Claim
143 words
For use with a video game system console having a game microprocessor for executing a video game program and a coprocessor coupled to said game microprocessor for cooperating with said game microprocessor to execute said video game program, a portable storage device for controlling the operation of said video game system console comprising: a memory media for storing video game instructions and graphics and sound data; a multiplexed bus, coupled in use to said coprocessor, for transmitting address signals in parallel to said memory media and for receiving information accessed from said memory media; addressing logic circuitry for gating address signals received from said bus to address said memory media; readout circuitry for coupling information readout of said memory media to said multiplexed bus; and a memory media authenticating processor for transmitting and receiving information to and from said video game system console.
Claim 33
Dependent Claim
99 words
A video game system comprising: an external memory for storing a video game program; a game microprocessor for executing said video game program, said game microprocessor being responsive to a predetermined interrupt signal to branch to a predetermined initialization state; a reset switch for generating a reset signal permitting a user to discontinue game play; and a logic circuit for receiving said reset signal for substantially immediately coupling an alert signal to said game processor indicating that said predetermined interrupt signal will follow and for thereafter coupling said predetermined interrupt to said game microprocessor after a predetermined time delay.
Claim 34
Dependent Claim
40 words
A video game system in accordance with claim 33, wherein said game microprocessor responds to said alert signal by saving the game state so game play may continue from at a predetermined point other than the beginning of the game.
Claim 35
Dependent Claim
107 words
In a video game system having an external memory for storing a video game program; a game microprocessor for executing said video game program, said game microprocessor being responsive to a predetermined interrupt signal to branch to a predetermined initialization state, a game play reset circuit comprising: a reset switch for generating a reset signal permitting a user to discontinue game play; and a logic circuit for receiving said reset signal for substantially immediately coupling an alert signal to said game processor indicating that said predetermined interrupt signal will follow and for thereafter coupling said predetermined interrupt signal to said game microprocessor after a predetermined time delay.
Claim 36
Dependent Claim
39 words
A reset circuit in accordance with claim 35, wherein said game microprocessor responds to said alert signal by saving the game state so game play may continue from at a predetermined point other than the beginning of the game.
References Cited (Backward Citations)
US4799635A
Cited
US5426762A
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USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.