A method of forming a low stress polycide conductors on a semiconductor chip
Abstract
Abstract A method of forming low resistivity conductive lines on a semiconductor substrate is disclosed. In practicing the method a multichamber tool is used to advantage by forming a first doped polysilicon layer on the surface of a substrate, forming a second undoped layer on the doped layer, while maintaining the work piece under a vacuum environment, moving the substrate to a second chamber and thereafter forming a silicide containing layer on the undoped polysilicon layer. various techniques may be used to deposit either the polysilicon or the silicide layer such as sputtering may also be used. Practice of the method eliminates separation of silicide from polysilicon and increases product yield.
Inventors
- 👤 Anthony Kendall Stamper
- 👤 Richard John Lebel
- 👤 Gary Lionel Langdeau
Bibliographic Details
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