Receiver having analog and digital video modes and receiving method thereof

Claim 2

A receiver according to claim 1, wherein said first signal processing means (100), comprises: a first tuner (511), for selecting a desired channel among received analog television channels, to output an intermediate frequency signal of said selected channel; a first channel demodulator (512) for amplifying and demodulating said intermediate frequency signal of the channel selected by said first tuner (511), to output a video signal; and a luminance/chrominance separator for separating the luminance (Y) signal and the chrominance signal (C) from video signals output from said first channel demodulator (512), using a correlation between adjacent pictures stored in said memory (330, 519) and/or between adjacent lines stored in said memory.

Claim 3

A receiver according to claim 2, further comprising a post-processor for post-processing using said separated luminance signal for enhancing picture quality.

Claim 4

A receiver according to claim 1, wherein said memory controller (320) includes switching means (320.1-320.n) for selecting one of the outputs from said first and second signal processing means (100, 200) according to said mode selection signal to write in said memory (330) and supply data stored in said memory (330) to said selected signal processing means.

Claim 5

A receiver according to claim 4, wherein said switching means includes at least one multiplexer.

Claim 6

A receiver according to claim 1, further comprising: switching means (340, 430, 524, 528, 622) for selecting one of the output signals from said first signal processing means (100, 511-13, 611-13) and said second signal processing means (200, 514-16, 614-16) according to said mode selection signal; and display controlling means (350, 440, 520, 620) for displaying the signal selected by said switching means on a display (360, 450, 521, 621).

Claim 7

A receiver having an analog video mode for receiving television signals analog processed by a predetermined analog broadcasting method and a digital video mode for receiving television signals digital-processed by a predetermined digital signal format, the receiver comprising: controlling means connected to common bus lines having a data line or multiple of data lines and a clock line for generating mode selection data which represents either said analog video mode or said digital video mode wherein first signal processing means is connected to said common bus lines, for signal-processing the analog television signal received according to the mode selection data, second signal processing means is connected to said common bus lines, for decoding the digital television signal received according to the mode selection data and a memory is connected to said common bus lines, for decoding the digital television signal from said second signal processing means, storing data processed in said first signal processing means according to said mode selection data for representing analog video service mode, and supplying the stored data to said first signal processing means.

Claim 8

A receiver according to claim 7, wherein said first signal processing means comprises: a first tuner for selecting a desired channel among received analog television channels, to output an intermediate frequency signal; a first channel demodulator for amplifying and demodulating said intermediate frequency signal of the channel selected by said first tuner to output a video signal; and a luminance/chrominance separator for separating video signal output from said first channel demodulator into luminance (Y) signal and chrominance (C) signal using correlation between adjacent pictures stored in said memory and between adjacent lines stored in said memory.

Claim 9

A receiver according to claim 8, further comprising a post-processor for post-processing said separated luminance signal for enhancing picture quality.

Claim 10

A receiver according to claim 2 or claim 8, wherein, in said analog video mode, said memory is used as a frame memory for storing data output from said first channel demodulator in a picture unit.

Claim 11

A receiver according to claim 3 or 9, wherein, in said analog video mode, said memory is used as a frame memory for storing data output from said first channel demodulator in a picture unit and data input from said post-processor in a picture unit.

Claim 12

A receiver according to claim 1 or 7, wherein said first signal processing means comprises: a first tuner for selecting a desired channel among received analog television channels, to output an intermediate frequency signal; a first channel demodulator for amplifying and demodulating said intermediate frequency signal of the channel selected by said first tuner and outputting a video signal; and a post-processor for post-processing using video signal output from said first channel demodulator and data stored in said memory.

Claim 13

A receiver according to claim 12, wherein, in said analog video mode, said memory is used as a frame memory for storing data output from said first channel demodulator in a picture unit.

Claim 14

A receiver according to claim 1 or 7, wherein said second signal processing means comprises: a second tuner for selecting a desired channel signal among received television signals coded by the digital signal format; a second channel demodulator for channel-decoding the desired channel signal output from said second tuner; a system decoder for outputting a video data stream from the channel-decoded signal output from said second channel demodulator; and a video decoder for reconstructing video data from said video data stream.

Claim 15

A receiver according to claim 14, wherein, in said digital video mode, said memory is used as a channel buffer for converting the transmission rate of a constant bit rate into a variable bit rate for video-decoding and as a frame buffer for motion compensation.

Claim 16

A receiver according to claim 7, further comprising: switching means for selecting one of the output signals from said first signal processing means and said second signal processing means according to said mode selection data; and display control means for displaying the signal selected by said switching means on display.

Claim 17

A receiver having an analog video mode for receiving television signal analog-processed by a predetermined analog broadcasting method and a digital video mode for receiving television signal digital-processed by a predetermined digital signal format, comprising: a first input terminal for receiving digitized analog television signal; a second input terminal for receiving channel-decoded digital television signal; a generator for generating a mode selection signal which represents either said analog video mode or said digital video mode; a memory for storing data in order to video-decode said channel-decoded digital television signal; a microprocessor for processing one of the signals input into said first and second input terminals according to said mode selection signal, and for controlling said memory so that said memory is shared by writing/reading the digitized analog signal which is input into said first input terminal to/from said memory in said analog video mode; and display controlling means for controlling the signal processed by said microprocessor so as to display the signal on a display.

Claim 18

A receiver according to claim 17, further comprising a system decoder for extracting video data stream from channel-decoded digital television signal input into said second input terminal.

Claim 19

A receiver according to claim 18, wherein said microprocessor performs luminance/chrominance separation of the digitized analog television signal input into said first input terminal, in said analog video mode, and reconstructing digital video signal from the video data stream output from said system decoder, in said digital video mode.

Claim 20

A receiver according to claim 17, wherein said microprocessor performs luminance/chrominance separating the digitized analog television signal which is input into said first input terminal, in said analog video mode, and performs system decoding, in said digital video mode, to thereby extract video data stream from the channel-decoded digital television signal input into said second input terminal.

Claim 21

A receiver according to claim 20, further comprising a video decoder for reconstructing digital video signal from the video data stream output from said microprocessor.

Claim 22

A receiver according to claim 17, wherein said microprocessor performs luminance/chrominance separation of the digitized analog television signal input into said first input terminal in said analog video mode, and extracts video data stream from the channel-decoded digital television signals input into said second input terminal, and reconstructs digital video signal from the extracted video data stream in said digital video mode.

Claim 23

A receiver according to claim 17, further comprising a system and video decoder for extracting a video data stream from the channel-decoded digital television signal input into said second input terminal and reconstructing digital video signal from the extracted video data stream.

Claim 24

A receiver according to claim 23, wherein said microprocessor performs luminance/chrominance separation of the digitized analog television signals input into said first input terminal, in said analog video mode, and writes and reads said digital television signal to and from said memory for system-decoding and video-decoding, in said digital video mode.

Claim 25

A receiver according to claim 19, wherein said microprocessor performs post-processing using separated luminance signal.

Claim 26

A receiver according to claim 19, wherein said memory is used as a frame memory for luminance/chrominance separation of the digitized analog television signal, in said analog video mode.

Claim 27

A receiver according to claim 25, wherein said memory is used as a frame memory for luminance/chrominance separation and post-processing, in said analog video mode.

Claim 28

A receiver according to claim 19, wherein said memory is used as a channel buffer for converting the transmission rate of a constant bit rate into a variable bit rate, as a frame buffer for motion compensation, and as a display buffer.

Claim 29

A receiver according to claim 18, wherein said microprocessor post-processes digitized analog television signal input into said first input terminal, in said analog video mode, and reconstructs digital video signal output from said system decoder, in said digital video mode.

Claim 30

A receiver according to claim 17, wherein said microprocessor performs post-processing of the digitized analog television signal input into said first input terminal, in said analog video mode, and system-decoding of the channel-decoded digital television signal input into said second input terminal, in said digital video mode, to thereby extract video data stream.

Claim 31

A receiver according to claim 30, wherein said microprocessor further comprises a video decoder for reconstructing said video data stream from said digital video signal.

Claim 32

A receiver according to claim 17, wherein said microprocessor performs post-processing of the digitized analog television signal input into said first input terminal, in said analog video mode, and system-decoding of the channel-decoded digital television signal input into said second input terminal, in said digital video mode, to thereby extract video data stream, and reconstructs digital video signal from the extracted video data stream.

Claim 33

A receiver according to claim 17, further comprising a system and video decoder for extracting video data stream from channel-decoded digital television signal input into said second input terminal and reconstructing video data from the extracted video data stream.

Claim 34

A receiver according to claim 33, wherein said microprocessor performs post-processing of the digitized analog television signal input into said first input terminal, in said analog video mode, and writes and reads said digital television signal to and from said memory for system-decoding and video-decoding, in said digital video mode.

Claim 35

A receiver according to claim 29, wherein said memory is used as a frame memory for post-processing, in said analog video mode.

Claim 36

A receiver according to claim 29, wherein said memory is used as a channel buffer for converting the transmission rate of a constant bit rate into a variable bit rate, as a frame buffer for motion compensation, and as a display buffer, in said digital video mode.

Claim 37

A receiver having an analog video mode for receiving television signal analog-processed by a predetermined analog broadcasting method and a digital video mode for receiving television signal digital-processed by a predetermined format, comprising: a first input terminal for receiving a channel-demodulated analog TV signal; a second input terminal for receiving a channel-decoded digital TV signal; a generator for generating a mode selection signal which represents either said analog video mode or said digital video mode; a memory for storing data either in a process of source-decoding said channel-decoded digital television signal or in a process of processing said channel-demodulated analog television signal; a microprocessor for writing/reading said digital television signal during said digital video mode or said digitized analog television signal during said analog video mode, to and from said memory according to said mode selection signal; analog processing means having an input terminal for receiving said channel-demodulated analog television signal, an input terminal for receiving data read from said memory through said microprocessor, an output terminal for outputting data to said microprocessor to store said data into said memory and an output terminal for outputting processed analog television signal; digital processing means having an input terminal for receiving said channel-decoded digital television signal, input and output terminals connected to said microprocessor, and a terminal for outputting said video signal reconstructed from said channel-decoded digital television signal; switching means for selecting one of said reconstructed digital video signal and said processed analog television signal according to said mode selection signal; and display controlling means for controlling the signal output from said switching means to display the signal on a display.

Claim 38

A receiver according to claim 37, wherein said digital processing means extracts video data stream from said channel-decoded digital television signal by system decoding, and reconstructs digital video signal from said extracted video data stream.

Claim 39

A receiver according to claim 37, wherein said digital processing means extracts video data stream from said channel-decoded digital television signal, reconstructs digital video signal from said extracted video data stream, and converts said reconstructed digital video signal into analog video signal.

Claim 40

A receiver according to claim 37, wherein said memory is used as a channel buffer for converting the transmission rate of a constant bit rate into a variable bit rate, as a frame buffer for motion compensation, and as a display buffer, in said digital mode.

Claim 41

A receiver according to claim 37, wherein said analog processing means performs luminance/chrominance separation of said channel-demodulated analog television signal.

Claim 42

A receiver according to claim 41, wherein, in said analog video mode, said memory is used as a frame memory for luminance/chrominance separation of said channel-demodulated analog television signal.

Claim 43

A receiver having an analog video mode for receiving television signal analog-processed by a predetermined analog broadcasting method and a digital video mode for receiving television signal digital-processed by a predetermined format, comprising: a first input terminal for receiving a channel-demodulated analog TV signal; a second input terminal for receiving a channel-decoded digital TV signal; a generator for generating a mode selection signal which represents either said analog video mode or said digital video mode; a memory for storing data in a process of either video-decoding of said channel-decoded digital television signal or in a process of processing said channel-demodulated analog television signal; a microprocessor having an input terminal for receiving said channel-decoded digital television signal, reconstructing digital video signal from said digital television signal in said digital video mode and for writing/reading said digital television signal during said digital video mode or said digitized analog television signal during said analog video mode, to and from said memory according to said mode selection signal; analog processing means having an input terminal for receiving said channel-demodulated analog television signal, an input terminal for receiving data read from said memory through said microprocessor, an output terminal for outputting data to said microprocessor to store said data into said memory and an output terminal for outputting processed analog television signal; digital processing means for converting said reconstructed digital video signal output from said microprocessor into analog signal; switching means for selecting one of said reconstructed digital video signal from said microprocessor and said processed analog television signal; and display controlling means for controlling the signal output from said switching means to display the signal on a display.

Claim 44

A receiver according to claim 43, wherein said microprocessor multiplexes said channel-decoded digital television signal, extracts video data stream from said channel-decoded digital television signal by system-decoding, and reconstructs said digital video signal from said extracted video data stream.

Claim 45

A receiver according to claim 43, further comprising a digital processing means for converting reconstructed digital video signal output from said microprocessor into analog signals and then supplying the converted analog signal to said switching means.

Claim 46

A receiver according to claim 43, wherein said display controlling means converts said switched signal into analog signal.

Claim 47

A receiver according to claim 44, wherein said memory is used as a buffer for temporarily storing said channel-demodulated analog television signal, as a channel buffer for converting the transmission rate of a constant bit rate into a variable bit rate, as a frame buffer for motion compensation, and as a display buffer.

Claim 48

A receiver having an analog video mode for receiving television signal analog-processed by a predetermined analog broadcasting method and a digital video mode for receiving television signal digital-processed by a predetermined format, comprising: a first input terminal for receiving a channel-demodulated analog TV signal; a second input terminal for receiving a channel-decoded digital TV signal; a generator for generating a mode selection signal which represents either said analog video mode or said digital video mode; a memory for storing data either in a process of source-decoding said channel-decoded digital television signal or in a process of processing channel-demodulated said analog television signal; a microprocessor having an input terminal for receiving said channel-decoded digital television signal, extracting video data stream from said channel-decoded digital television signal in said digital video mode, and for writing/reading said digital television signal during said digital video mode or said digitized analog television signal during said analog video mode, to/from said memory according to said mode selection signal; analog processing means having an input terminal for receiving said channel-demodulated analog television signal, an input terminal for receiving data read from said memory through said microprocessor, an output terminal for outputting data to said microprocessor to store said data into said memory, and an output terminal for outputting processed analog television signal; digital processing means for reconstructing digital video signal from said video data stream; switching means for selecting one of output signal of said digital processing means and said processed analog TV signal; and display controlling means for controlling the signal output from said switching means to display the signal on a display.

Claim 49

A receiver according to claim 48, wherein said microprocessor multiplexes said channel-decoded digital television signal and extracts video data stream from said channel-decoded digital television signal.

Claim 50

A receiver according to claim 48, wherein said digital processing means converts reconstructed digital video signals into analog signal.

Claim 51

A receiver according to claim 48, wherein said display controlling means converts the signal switched in said switching means into analog signal.

Claim 52

A receiver according to claim 49, wherein said memory is used as a buffer for temporarily storing said channel-demodulated analog television signal, as a channel buffer for converting a transmission rate of a constant bit rate into a variable bit rate, as a frame buffer for motion compensation, and as a display buffer, in said digital video mode.

Claim 53

A receiver according to claim 43 or 48, wherein said analog processing means performs luminance/chrominance separation of said channel-demodulated analog television signal.

Claim 54

A receiver according to claim 53, wherein said memory is used as a frame memory for luminance/chrominance separation of said channel-demodulated analog television signal, in said analog video mode.

Claim 55

A receiver according to claim 37, 43 or 48, wherein said analog processing means performs post-processing of said channel-demodulated analog television signal.

Claim 56

A receiver according to claim 55, wherein said memory is used as a frame memory for post-processing of said channel-demodulated analog television signal, in said analog video mode.

Claim 57

A receiver according to claim 37, 43 or 48, wherein said analog processing means performs luminance/chrominance separation and post-processing of said channel-demodulated analog television signal.

Claim 58

A receiver according to claim 57, wherein said memory is used as a frame memory for luminance/chrominance separation and post-processing of said channel-demodulated analog television signal, in said analog video mode.

Claim 59

A receiver having an analog video mode for receiving television signal analog-processed by a predetermined analog broadcasting method and a digital video mode for receiving television signal digital-processed by a predetermined format, comprising: a first input terminal for receiving a channel-demodulated analog TV signal; a second input terminal for receiving a channel-decoded digital TV signal; a generator for generating a mode selection signal for representing said analog video mode and said digital video mode; a memory for storing data in a process of either source-decoding said channel-decoded digital television signal or processing channel-demodulated said analog television signal; digital processing means including an input terminal for receiving said channel-decoded digital television signal and for extracting video data stream from said channel-decoded digital television; a microprocessor for inputting video data stream extracted from said digital processing means, thereby reconstructing digital video signal, and writing and reading digitized analog television signal to/from said memory in analog video mode; analog processing means having an input terminal for receiving said channel-demodulated analog television signal, an input terminal for receiving data read from said memory through said microprocessor, an output terminal for outputting data to said microprocessor to store said data into said memory, and an output terminal for outputting processed analog television signal; switching means for selecting one of output signal of said digital processing means and said processed analog TV signal; and display controlling means for controlling the signal output from said switching means to display the signal on a display.

Claim 60

A receiver according to claim 59, further comprising converting means for converting digital video signal reconstructed in said microprocessor into analog signal and then supplying the converted analog signal to said switching means, where the signal output from said analog processing means is an analog signal.

Claim 61

A receiver according to claim 59, wherein said display controlling means converts the signal switched in said switching means into analog signal, where the switched signal is a digital signal.

Claim 62

A receiver according to claim 59, wherein said memory is used as a channel buffer for converting a transmission rate of a constant bit rate into a variable bit rate, as a frame buffer for motion compensation, and as a display buffer, in said digital video mode.

Claim 63

A converter according to claim 59, wherein said analog processing means performs luminance/chrominance separation of said channel-demodulated analog television signal.

Claim 64

A receiver according to claim 63, wherein said memory is used as a frame memory for luminance/chrominance separation of said channel-demodulated analog television signal, in said analog video mode.

Claim 65

A receiver according to claim 59, wherein said analog processing means performs post-processing of said channel-demodulated analog television signals.

Claim 66

A receiver according to claim 65, wherein said memory is used as a frame memory for post-processing of said channel-demodulated analog television signal, in said analog video mode.

Claim 67

A receiver according to claim 59, wherein said analog processing means performs luminance/chrominance separation and post-processing said channel demodulated analog television signal.

Claim 68

A receiver according to claim 67, wherein said memory is used as a frame memory for luminance/chrominance separation and post-processing of said channel-demodulated analog television signal, in said analog video mode.