EP0758182A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Solid-state image sensing device
Assignee: Sony Corp
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Filing: 1996-07-10
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Granted: —
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Expires: 2016-07-10
Abstract
Abstract When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping is generally supplied to an A/D converter (16) as generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks φH1 and φH2 of a signal output by an empty transmission unit (13a) by means of a clamp pulse φCLP1, and a sample/hold output Va for the second picture element or a subsequent one of an OPB unit (11a) is clamped to a clamp level Vref by means of a clamp pulse φCLP2 so as to prevent a signal output Vout exceeding a reference voltage from being supplied to the downstream A/D converter.
Inventors
- 👤 Satoshi Yoshihara
- 👤 Yasuhito Maki
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 13:25
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/70; H04N25/701; H04N25/60; H04N25/63; H04N25/633; H04N25/67; H04N25/671; H04N25/673; H04N25/71; H04N25/713; H04N25/74; H04N25/745; H04N25/75; H04N25/76; H04N25/78
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
71 words
A solid state imaging system comprising: a solid state image sensing element (13) outputting an electrical signal including at least an empty transmission signal and an image sensing picture element signal sequentially during a time-axis in a cycle, and a clamp circuit (22) for clamping said electrical signal to a reference voltage wherein said clamp circuit clamps at least a signal portion having a highest voltage in said empty transmission signal.
Claim 2
Dependent Claim
30 words
A solid state imaging system according to claim 1, further comprising an A/D converter (16) connected to said clamp circuit for converting said clamped electrical signal to a digital signal.
Claim 3
Dependent Claim
29 words
A solid state imaging system according to claim 1, further comprising a sample and hold circuit (21) connected between said image sensing element (13) and said clamp circuit (22).
Claim 4
Dependent Claim
27 words
A solid state imaging system according to claim 1, wherein said image sensing element comprises an image sensing unit (11) and a charge transfer unit (12, 13).
Claim 5
Dependent Claim
110 words
A solid state imaging system comprising: a solid state image sensing element having a sensor unit (11) for generating signal charges and a transferring unit (13) for transferring said signal charges read out from said image sensing unit in response to transfer clocks, said image sensing element outputting an electrical signal corresponding to said signal charges, said electrical signal including at least an empty transmission signal, a first optical black signal and an image signal sequentially along a time axis in a unit cycle, a clamp circuit (22) for clamping said electrical signal to a reference voltage over a period of time covering an inhibit period of said transfer clocks.
Claim 6
Dependent Claim
26 words
A solid state imaging system according to claim 5, wherein said inhibit period of said transfer clocks exists within a period of said empty transmission signal.
Claim 7
Dependent Claim
43 words
A solid state imaging system according to claim 6, wherein said clamp circuit clamps a signal portion over a period of time between a point of time before said empty transmission signal and a halfway point of time of said empty transmission signal.
Claim 8
Dependent Claim
48 words
A solid state imaging system according to claim 7, wherein said clamp circuit clamps a signal portion over a period of time between an end point of time in said image signal preceding ahead by one cycle and a halfway point of time in said empty transmission signal.
Claim 9
Dependent Claim
49 words
A solid state imaging system according to claim 8, wherein said clamp circuit clamps a signal portion over a period of time between an end point of time in said image signal preceding ahead by one cycle and a halfway point of time in said first optical black signal.
Claim 10
Dependent Claim
28 words
A solid state imaging system according to claim 5, wherein said electrical signal further comprises a second optical black signal just after said image signal in said cycle.
Claim 11
Dependent Claim
50 words
A solid state imaging system according to claim 10, wherein said clamp circuit clamps a signal portion over a period of time between a halfway point of time in said second optical black signal preceding ahead by one cycle and a halfway point of time in said empty transmission signal.
Claim 12
Dependent Claim
30 words
A solid state imaging system according to claim 5, further comprising an A/D converter (16) connected to said clamp circuit for converting the clamped electrical signal to a digital signal.
Claim 13
Dependent Claim
27 words
A solid state imaging system according to claim 5, further comprising a sample and hold circuit (21) connected between said image sensing element and said clamp circuit.
Claim 14
Dependent Claim
154 words
A solid state imaging system comprising: a solid state image sensing element having a sensor unit (11) for generating signal charges and a transferring unit (13) for transferring said signal charges read out from said image sensing unit in response to transfer clocks, said image sensing element outputting an electrical signal corresponding to said signal charges, said electrical signal including at least an empty transmission signal, a first optical black signal, an image signal, and a second optical black signal sequentially in time-axis in a unit cycle, a clamp circuit (22) for clamping said electrical signal to a reference voltage over a period of time between a halfway point of time in said second optical black signal preceding ahead by one cycle and an end point of an inhibit period of said transfer clocks, and an A/D converter (16) connected to said clamp circuit for converting a clamped electrical signal to a digital signal.
Claim 15
Dependent Claim
27 words
A solid state imaging system according to claim 14, further comprising a sample and hold circuit (21) connected between said image sensing element and said clamp circuit.
Claim 16
Dependent Claim
128 words
A solid state imaging system comprising: a solid state image sensing element having a sensor unit (11) for generating signal charges and a transferring unit (13) for transferring said signal charges read out from said image sensing unit during a transfer period in a unit cycle, said image sensing element outputting an electrical signal corresponding to said signal charges, a clamp circuit (22) connected to said solid state image sensing element for clamping said electrical signal to a reference voltage, wherein said clamp circuit clamps at least said electrical signal not superpositioned on an electrical signal of previous cycle in the case where an operation to read out said signal charges from said sensor unit to said transferring unit occurs during said transfer period of said signal charges.
Claim 17
Dependent Claim
29 words
A solid state imaging system according to claim 16, further comprising an A/D converter (16) connected to said clamp circuit for converting clamped electrical signal to a digital signal.
Claim 18
Dependent Claim
27 words
A solid state imaging system according to claim 16, further comprising a sample and hold circuit (21) connected between said image sensing element and said clamp circuit.
Claim 19
Dependent Claim
145 words
A solid state imaging system comprising: a solid state image sensing element having a sensor unit (11) for generating signal charges and a transferring unit (13) for transferring said signal charges read out from said image sensing unit during a transfer period in a unit cycle, said image sensing element outputting an electrical signal corresponding to said signal charges, a clamp circuit (22) connected to said solid state image sensing element for clamping said electrical signal to a reference voltage, a timing generator for generating clamp pulses for said clamp circuit, wherein said timing generator includes an inhibit circuit (48-49) for inhibiting generation of clamp pulses in response to an operation to read out signal charges in the case where an operation to read out said signal charges from said sensor unit to said transferring unit occurs during said transfer period of said signal charges.
Claim 20
Dependent Claim
29 words
A solid state imaging system according to claim 19, further comprising an A/D converter (16) connected to said clamp circuit for converting clamped electrical signal to a digital signal.
Claim 21
Dependent Claim
27 words
A solid state imaging system according to claim 19, further comprising a sample and hold circuit (21) connected between said image sensing element and said clamp circuit.
Claim 22
Dependent Claim
152 words
A solid state imaging device having imaging devices (PS) in an array for outputting electric charge signals from said devices; means (13-16) for transferring said electric charge signals read out from said image devices, said transferring means including an A/D converter (16), said electric charge signals including at least an empty transmission signal and an image sensing picture element signal output sequentially along a time axis during a cycle ; a clamp circuit (22) for clamping said electric charge signals output from said imaging devices to a reference level related to a highest level in said empty transmission signal; and timing generator means (17) for reading out said electric charge signals and generating clamp pulses for clamping a signal portion of said electric signal corresponding to at least one picture element of a picture element shading unit and for clamping a signal output by an empty transmission unit of said output signals.
Claim 23
Dependent Claim
71 words
A solid state imaging device as set forth in claim 22, wherein said timing generator (17, 41-45) employed in a solid-state image sensing device generates clamping pulses clamping a signal portion corresponding to at least one picture element of an OPB unit and for clamping a signal output by an empty transmission unit of an electric-charge transferring unit over a period of time covering an inhibit period of a transfer clock.
Claim 24
Dependent Claim
80 words
A solid state imaging device as set forth in claim 22, wherein said timing generator (17, 41-45) generates clamping pulses for clamping a signal portion corresponding to at least one picture element of an OPB unit and for clamping a signal over a period of time between a halfway point of time in a signal output by an OPB unit and a halfway point of time in a signal output by an empty transmission unit of an electric-charge transferring unit.
Claim 25
Dependent Claim
84 words
A solid state imaging device as set forth in claim 22, wherein said timing generator (17, 41-45) generates clamp pulses for clamping a signal portion corresponding to at least one picture element of an OPB unit and for clamping a signal over a period of time between a halfway point of time in a signal output by an OPB unit and the end of an inhibit period of transfer clocks for a signal output by an empty transmission unit of an electric-charge transferring unit.
Claim 26
Dependent Claim
89 words
A solid state imaging device as set forth in claim 22, wherein said timing generator (17, 41-45) generates clamping pulses for clamping a signal portion corresponding to at least one picture element of an OPB unit and for clamping a signal over a period of time between a halfway point of time in a signal of the last picture element preceding ahead by one line and the end of an inhibit period of transfer clocks for a signal output by an empty transmission unit of said electric-charge transferring unit.
Claim 27
Dependent Claim
63 words
A solid state image sensing device as set forth in claim 22, wherein said timing generator (17, 41-47) cooperates with said device which includes means for clamping at least a picture element signal not superpositioned on a picture element signal obtained from a previous read operation when an operation to read signal electric charge occurs during a transfer period of signal electric charge.
Claim 28
Dependent Claim
57 words
A solid state imaging sensing device as set forth in claim 22, wherein said timing generator (17, 41-49) includes an inhibit circuit means (48, 49) for inhibiting generation of clamp pulses in synchronization with an operation to read out said signal electric charge during a transfer period for signal electric charge when such a read operation occurs.
References Cited (Backward Citations)
No citation records indexed.
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