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EP0729094A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

A mixed-endian computing environment for a conventional bi-endian computer system

Assignee: International Business Machines Corp
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Filing: 1996-01-23
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Granted: —
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Expires: 2016-01-23
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Abstract

Abstract A conventional bi-endian computer system is enhanced to include mixed-endian mechanisms that allows the computer system to dynamically change its endian mode. The mixed-endian computer system can change endian mode on a task by task basis if necessary. The mixed-endian mechanisms automatically format the data in the form expected by the running task, regardless of whether the task expects the data to be in big endian format or in little endian format. The mixed-endian mechanisms also format big and little endian instructions such that they can execute on the same computer system.

Inventors

  • 👤 Larry Wayne Loen
  • 👤 Edward John Silha

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 14:33
CPC Classifications
G; G06; G06F; G06F7/00; G06F9/00; G06F9/06; G06F9/30; G06F9/34; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4009; G06F13/4013; G06F9/38; G06F9/3824

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 51 words
A computer system, said computer system comprising: a conventional bi-endian processor; and memory, said memory comprising big endian programs and little endian programs, said big endian programs executing as big endian tasks and said little endian programs executing as little endian tasks on a task-for-task basis on said conventional bi-endian processor.
Claim 2
Dependent Claim 26 words
A computer system, said computer system comprising: a mixed-endian mechanism, said mixed-endian mechanism tracking and controlling data and address adjustments made by a conventional bi-endian processor.
Claim 3
Dependent Claim 35 words
The computer system of claim 11 wherein said conventional bi-endian processor is big endian biased and wherein said data and address adjustments are made such that said conventional bi-endian processor can process little endian data.
Claim 4
Dependent Claim 49 words
A method to be used in a computer system as defined in claim 1 comprising the steps of : initiating a big endian task for execution directly on a processor; and interrupting said big endian task and immediately initiating a little endian task for execution directly on said processor.

References Cited (Backward Citations)

EP0470570A2 Cited
WO1994015269A2 Cited

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