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EP0724344A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

High performance frame time monitoring system and method for a fiber optic switch for a fiber optic network

Assignee: McData Corp
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Filing: 1996-01-16
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Granted: —
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Expires: 2016-01-16
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Abstract

Abstract A frame time monitoring system (100) tracks the time in which data frames (11) reside within a fiber optic switch (30) for a fiber optic network. The network switch (30) transfers data frames (11) from source ports (33) to destination ports (33). The frame time monitoring system comprises a digital signal processor (DSP) (100a), which is configured by a software program (108) to implement a plurality of timers (164) relative to frames (11) to be routed through the switch (30) from a source port (33) to a destination port (33). The processor (100a) operates as an incrementer and is configured to output a series of sequential timer states (144) corresponding to each particular frame (11). The timer states (144) are generally indicative of the amount of time in which the frame (11) has resided in the switch (30). A logic network (100b) of logic gates is connected to the processor (100a) to receive and interpret the timer states (144). The logic network (100b) has frame busy (FBSY) and delete mechanisms (204, 207) for determining elapse of respective FBSY and delete time periods based upon the timer states (144). The FBSY and delete mechanisms (204, 207) generate respective FBSY and delete signals (146, 147) after the elapse of the periods, which can vary for optimization reasons depending upon frame class and type. Thus, in the foregoing configuration, a processor (100a) is utilized as a timing incrementer and logical decisions are allocated to the logic network (100b), resulting in an optimum balance between hardware and software so as to minimize cost, space requirements, and complexity, and maximize frame tracking resolution.

Inventors

  • 👤 Robert H. Grant
  • 👤 David Book
  • 👤 Gregory T. Sullivan

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 21:52
CPC Classifications
H; H04; H04L; H04L43/00; H04L49/00; H04L49/35; H04L49/356; H04L49/357; H04L43/08; H04L43/0876; H04L49/30; H04L49/351

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 178 words
A frame time monitoring system (100) for tracking with high performance the time in which data frames (11) reside within a fiber optic switch (30) for a fiber optic network, the network switch (30) for transferring the data frames (11) from source ports (33) to destination ports (33), comprising: a processor (100a) configured to implement a timer (164) relative to an incoming frame (11) upon notification of receipt of said frame (11) by a source port, said processor (100a) configured to output sequential timer states (144); and a logic network (100b) connected to said processor (100a) to receive said timer states (144), said logic network (100b) comprising a delete means (204, 207) for determining elapse of a predetermined delete time period based upon said timer states (144), said delete means (204, 207) for generating a delete signal (147) after said elapse of said predetermined delete time period; whereby high performance is achieved by utilizing said processor (100a) as a timing incrementer and by allocating logical decisions to said logic network (100b) which is faster than said processor (100a).
Claim 2
Dependent Claim 82 words
The system (100) of claim 1, wherein said logic network (100b) further comprises: frame return determination means (203) for determining when said frame (11) is returnable and nonreturnable to said source port; and frame busy means (204, 207) for determining elapse of a predetermined frame busy time period based upon said timer states (144) when said frame (11) is returnable, said frame busy means (204, 207) for generating a frame busy signal (146) after said elapse of said frame busy time period.
Claim 3
Dependent Claim 16 words
The system (100) of claim 1, wherein said processor (100a) is a digital signal processor (100a).
Claim 4
Dependent Claim 33 words
The system (100) of claim 1, wherein said logic network (100b) is implemented in hardware with an integrated circuit (100b) and wherein said timer (164) is implemented in software within said processor (100a).
Claim 5
Dependent Claim 524 words
A frame time monitoring system (100) for tracking with high performance the time in which data frames (11) reside within a fiber optic switch (30) for a fiber optic network, the network switch (30) for transferring the data frames (11) from source to destination fiber optic channels (32), comprising: (a) a plurality of ports (33) corresponding respectively with said channels (32); (b) a memory means (84) associated with said ports (33), said memory means (84) for temporarily storing an incoming new data frame (11) from a source port (33); (c) a distribution network (42, 44) configured to interconnect said ports (33); (d) a sentry (104) in communication with said memory means (84), said sentry (104) configured to determine when said new data frame (121) has been received by said memory means (84); (e) a scheduler (118) which maintains a destination queue (121) corresponding with each of said ports (33), said scheduler (118) configured to receive path data (151) pertaining to said new data frame (121) from said sentry (104) after said sentry (104) determines receipt of said new data frame (121), said path data (151) including a source port indicator (151d), a memory address (151c, 151b) identifying a location of said frame (11) in said memory means (84), and a destination port indicator (155a), and said scheduler (118) configured to place said path data (151) within a destination queue (121) corresponding with said destination port (33) and to retrieve said path data (151) from said destination queue (121) based upon an order defined by said queue (121); (f) an arbitrator (123) configured to control said distribution network (42, 44) and to communicate with said scheduler (118), said arbitrator (123) configured to determine, after said arbitrator (123) receives a frame transfer request (122) from said scheduler (118), when said destination port (33) is busy servicing another frame transfer request (122) and when said destination port (33) is available for accommodating said frame transfer request (122), and said arbitrator (123) configured to allow communication of said new data frame (121) to said destination port (33) via said distribution network (42, 44) when said destination port (33) is available and to disallow said frame transfer request (122) when said destination port (33) is busy; and (g) a frame time monitoring mechanism (100) configured to track time associated with said new data frame (121), said frame time monitoring mechanism (100) having: (1) a processor (100a) configured to implement a timer (164) relative to said new data frame (11), said timer (164) being initiated by said sentry (104) when said new data frame (11) is determined to exist within said memory means (84), said processor (100a) configured to output timer states (144), said timer (164) being cleared via a clear signal (142) from said arbitrator (123) when said frame transfer request (122) corresponding to said new data frame (121) is allowed; and (2) a logic network (100b) connected to said processor (100a) to receive said timer states (144), said logic network (100b) for communicating a delete signal (147) to said scheduler (118) after a predetermined delete time period unless said clear signal (142) is received from said arbitrator (123).
Claim 6
Dependent Claim 85 words
The system (100) of claim 5, wherein said frame time monitoring mechanism (100) further comprises: frame return determination means (203) for determining when said frame (11) is returnable and nonreturnable to said source port (33); and frame busy means (204, 207) for determining elapse of a predetermined frame busy time period based upon said timer states (144) when said frame (11) is returnable, said frame busy means (204, 207) for generating a frame busy signal (146) after said elapse of said frame busy time period.
Claim 7
Dependent Claim 133 words
A frame time monitoring method (100) for tracking with high performance the time in which data frames (11) reside within a fiber optic switch (30) for a fiber optic network, the switch (30) for transferring the data frames (11) from source ports (33) to destination ports (33), comprising the steps of: (a) implementing a timer (164) in software with a processor (100a); (b) commencing said timer (164) after receipt of a frame (11); and (c) passing timer states (144) from said timer (164) to a logic network (100b) in hardware, said logic network (100b) performing the following steps: (1) determining (204, 207) elapse of a predetermined delete time period based upon said timer states (144); and (2) generating (206, 208) a delete signal (147) after said elapse of said predetermined delete time period.
Claim 8
Dependent Claim 82 words
The method of claim 7, wherein said logic network (100b) as recited in step (c) further performs the following steps: (3) determining (203) when said frame (11) is returnable and nonreturnable to said source port; and (4) determining (204, 207) elapse of a predetermined frame busy time period based upon said timer states (144) when said frame (11) is returnable, and when said frame (11) is returnable, generating a frame busy signal (146) after said elapse of said frame busy time period.
Claim 9
Dependent Claim 51 words
The method of claim 7, further comprising the steps of: determining (176) a frame type corresponding with said frame (11); retrieving (188) a time value corresponding with said frame type; decrementing (191, 192) said time value; and generating (193) said timer states (144) based upon a status of said time value.
Claim 10
Dependent Claim 30 words
The method of claim 8, further comprising the step of specifying a plurality of frame busy time periods and a plurality of delete time periods corresponding with different frame types.

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