Method for making ohmic contact to lightly doped islands from a silicide buried layer and applications

Claim 2

A process as claimed in claim 1 including the steps of bonding a handle wafer to the first layer and simultaneously diffusing the first dopant from the first layer into the device wafer and the handle wafer to respectively form first and second heavily doped layers adjacent opposite surfaces of the first layer.

Claim 3

A process as claimed in claims 1 or 2 wherein the silicide is selected from the group consisting of tungsten silicide and titanium silicide, and the first dopant is one selected from the group consisting of P, As, 8, and Sb.

Claim 4

A process as claimed in claims 1, 2, or 3 including the steps of: forming a plurality of isolation trenches, each trench having spaced apart wall and a bottom and extending from the other surface of the device wafer to the first layer to define a plurality of device islands; placing a dielectric material between the trenches and the adjacent device wafer, heavily doping portions of the islands with said first dopant, diffusing the first dopant to the first layer and through the first layer to form a heavily doped layer beneath the device island in ohmic contact with the first layer, and in which the walls of the trenches are heavily doped with the first dopant, and a portion of one of the islands at a location adjacent to one of the trenches is heavily doped with said first dopant, in the further steps of heavily doping a portion of another island with a second dopant, and diffusing the second dopant to the first layer and also through the first layer to form a heavily doped layer beneath the other device island in ohmic contact with the first layer, and also the step of doping the bottoms of the trenches to form channel stops beneath the trenches.

Claim 5

A process as claimed in claim 4 wherein the trenches are coated with a dielectric layer and filled with a semiconductor material, in which the dielectric material is silicon dioxide and the semiconductor material is polysilicon.

Claim 6

A process as claimed in any one of claims 1 to 5 including the step of oxide bonding a handle wafer to the device wafer and forming the trenches from the other surface of the device wafer to the oxide bonding, with the step of doping a portion of the other surface of the device wafer with a second dopant of a polarity different from the polarity of the first dopant, so that the second dopant forms a collector.

Claim 7

A process as claimed in claim 1 including the steps of forming a surface contact trench extending from the other surface of the device wafer to the first layer, coating the trench with said diffusing material of said first layer, heavily doping the first material of the first layer, with the further steps of bonding a handle wafer to the first layer, heavily doping the device wafer, diffusing the doping to the first layer and through the first layer to the handle wafer to provide an ohmic contact between the first layer and the handle wafer, in which diffusion coefficient of the first dopant in the first layer is at least one thousand times greater than the diffusion coefficient of the first dopant in the device wafer.

Claim 8

A process for making an ohmic contact to a buried layer comprising the steps of, forming a silicide layer on one surface of a silicon device wafer having a first dopant of a first polarity silicide bonding to the silicide layer a handle wafer having a second dopant of a second polarity, in a first region on the device wafer providing a first isolation diffusion of the first polarity in the device wafer, in said first region providing a collector diffusion of the second polarity, growing an epitaxial layer on the device wafer, electrically isolating the first region from adjoining regions of the device wafer to form device islands electrically isolated from each other, heavily doping part of one of the islands with a first dopant, diffusing the first dopant to the silicide layer to form an ohmic contact between the silicide layer and the island, and the step of electrically isolating the adjoining regions of the device wafer includes forming dielectric isolation trenches between the adjoining regions, including the further steps of forming channel stop regions beneath the trenches.

Claim 9

A process for making an ohmic contact to a buried layer comprising the steps of: growing an epitaxial layer on a silicon device wafer heavily doped with dopant of a first polarity; forming a silicide layer on the epitaxial layer; bonding a handle wafer lightly doped with a dopant to the silicide layer; removing the device wafer to expose a surface of the epitaxial layer; forming a plurality of trenches in the epitaxial layer, said trenches extending to the silicide layer and forming a plurality of epitaxial islands, each island in contact with the silicide layer; masking the surface of the epitaxial layer and heavily doping the epitaxial material in the trenches with a first dopant; diffusing the first dopant through the silicide layer to 5 form ohmic contacts between the islands and the silicide layer.

Claim 10

A process as claimed in claim 8 including the steps of: extending the trenches to the handle wafer; dielectrically isolating the trenches from the handle substrate, and the forming channel stops in the bottoms of the trenches, with the step of forming an oxide layer on the silicide layer prior to bonding, oxide bonding the handle wafer to the device wafer, and removing the silicide from the trenches after doping of the trenches.

Claim 11

A semiconductor device having an ohmic contact to a buried layer comprising: a device wafer; a first layer of diffusing material on one surface of the device wafer, said first layer including a first dopant and having a rate of diffusion for said first dopant that is substantially greater than the rate of diffusion in the device wafer for said first dopant; a first heavily doped layer in said device wafer adjacent the first layer, containing dopant diffused from said first layer and providing ohmic contact between the first layer and the heavily doped layer.

Claim 12

A semiconductor device as claimed in claim 10 including a handle wafer bonded to the first layer and also containing dopant diffused from the first layer to form first and second heavily doped layers adjacent opposite surfaces of the first layer, with the device wafer is silicon and the first layer is a silicide, in which the silicide is selected from the group consisting of tungsten silicide and titanium silicide, and the first dopant is one selected from the group consisting of P, As, B, and Sb.

Claim 13

A semiconductor device as claimed in claim 10 or 11 including a plurality of isolation trenches, each trench having spaced apart walls and a bottom and extending from the other surface of the device wafer through the first layer to define a plurality of device islands; and dielectric material on the trench walls adjacent the device wafer, in which the walls of the trenches are heavily doped with the first dopant, preferably a portion of one of the islands at a location adjacent to one of the trenches is heavily doped with said first dopant, and a second device island is heavily doped with a second dopant; and the second dopant from said device island is diffused to the first layer and through the first layer to form a heavily doped layer beneath the second device island in ohmic contact with the first layer.

Claim 14

A semiconductor device as claimed in claim 12 wherein channel stops are formed beneath the trenches, and are coated with a dielectric layer and filled with a semiconductor material, in which the dielectric material is silicon dioxide and the semiconductor material is polysilicon, and the second dopant forms a collector.

Claim 15

A semiconductor device having an ohmic contact to a buried layer comprising: a silicon device wafer; a silicide layer on one surface of a silicon device wafer; a handle wafer bonded to the silicide layer; an epitaxial layer on the device wafer; adjoining regions of the device wafer separated by electrical isolation to form device islands electrically 10 isolated from each other; one region of an island having a heavy doping of a first dopant of a first polarity, said first dopant diffused to form an ohmic contact between the silicide layer and the island.

Claim 16

A semiconductor device as claimed in claim 5 wherein the device wafer is lightly doped with said first dopant of a first polarity, and one or more islands are doped with a second dopant of a second polarity, in which trenches having dielectric material electrically isolate the adjoining islands, with the handle wafer is bonded to the silicide layer with an oxide bonding layer, and the silicide layer bonds the handle wafer to the device wafer.

Claim 17

A semiconductor device having an ohmic contact to a buried layer comprising: a silicon device wafer doped with a Thirst dopant of a first polarity; a handle wafer having a second dopant of a second polarity; a silicide layer on one surface of the silicon device wafer for silicide bonding the handle wafer to the device wafer; a first region on the device wafer providing a first isolation diffusion of a dopant of the first polarity; in said first region a collector diffusion of a dopant of the second polarity; an epitaxial layer on the device wafer over the isolation diffusion; means for electrically isolating the first region and forming adjoining island of the device wafer, said adjoining islands electrically isolated from each other; a heavily doped region of a first dopant in one of the islands with a first dopant with said first dopant diffused from said heavily doped region to the silicide layer to form an ohmic contact between the silicide layer and the island.

Claim 18

A semiconductor device as claimed in claim 17 wherein the means for electrically isolating the adjoining regions of the device wafer includes dielectric isolation trenches between the adjoining regions, with channel stop regions beneath the trenches, in which the dopant from the first region is diffused to and through the silicide layer to form an ohmic contact between the silicide layer and the first island and to form a junction between the handle wafer and the diffused region.