Storage control system for prohibiting rewriting in a determined storage area

Claim 2

The storage control system according to claim 1, wherein the last address of said area not requiring re-writing of stored content and data indicative of the width of said area are used as data for designating said area.

Claim 3

The storage control system according to claim 1, wherein first data concerning the line direction of the memory and second data concerning the row direction of the memory are used as data for designating said area not requiring change of stored content.

Claim 4

A storage control system comprising: a memory divided by plurality of bit boundaries, means for accessing the memory with a number of bits between adjacent bit boundaries as a unit, and prohibiting means for prohibiting change of data with respect to a specific area of the memory, the prohibiting means designating a write prohibit address on the basis of first data for prescribing at least one side of the specific area and second data for prescribing the width of the specific area.

Claim 5

A storage control method for controlling reading and writing of data with respect to a memory divided by a plurality of bit boundaries, comprising: a first step of designating a write prohibit area; a second step of judging whether any bit boundary is present in the prohibit area; and a third step of permitting writing of all data in the memory if it is found as a result of the judgment that no bit boundary is present and prohibiting the change of data in a write prohibit area by calculating the bit width corresponding to the write prohibit area on the basis of the bit boundaries if the bit boundary is present.

Claim 6

Storage control system comprising: a display memory having a write permit area and a write prohibit area in which and from which data is written in and read out in response to an externally supplied address; a display data storage area designation register for designating the X direction display bit width of display data stored in the display memory in response to display bit width designation data; a mask bit width designation register for designating the mask bit width of data to be masked, i.e., data that is not re-written among the display bit widths designated by the display data storage area designation register in response to mask bit width designation data; said display data storage area designation register and mask bit width designation register designating X direction bit widths on the map of the display memory: a write judgment/designation signal generator for determining the opposite ends of the write prohibit area in the display memory to define four different states of address, an address in which all the bits are in a write permit area, an address in which predetermined upper bits are in a write permit area and predetermined lower bits are in a write prohibit area, an address in which all the bits are in a write prohibit area, and an address in which predetermined upper bits are in a write prohibit area and predetermined lower bits are in a write permit area, determining the address in either of the four data mask state that corresponds to supplied address data, and generating a write permit signal and a write prohibit signal with respect to the bit unit corresponding to the address; and a write control unit for writing only effective bits of the write data in the display memory according to the write permit signal and write prohibit signal with respect to the bit unit supplied from the write judgment/designation signal generator.

Claim 7

Storage control system comprising: a display memory having a write permit area and a write prohibit area in which and from which data is written in and read out in response to an externally supplied address; two display data storage area designation registers for designating the X and Y direction display bit widths of display data stored in the display memory in response to display bit width designation data; a mask bit width designation register for designating the mask bit width of data to be masked which is data that is not re-written among the display bit widths designated by the display data storage area designation register in response to mask bit width designation data; said display data storage area designation register and mask bit width designation register designating X and Y direction bit widths on the map of the display memory: a write judgment/designation signal generator for determining the opposite ends of the write prohibit area in the display memory to define four different states of address; an address in which all the bits are in a write permit area, an address in which predetermined upper bits are in a write permit area and predetermined lower bits are in a write prohibit area, an address in which all the bits are in a write prohibit area, and an address in which predetermined upper bits are in a write prohibit area and predetermined lower bits are in a write permit area, determining the address in either of the four data mask state that corresponds to supplied address data, and generating a write permit signal and a write prohibit signal with respect to the bit unit corresponding to the address; and a write control unit for writing only effective bits of the write data in the display memory according to the write permit signal and write prohibit signal with respect to the bit unit supplied from the write judgment/designation signal generator.