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EP0705000A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Constant bit rate synchronisation for packet telecommunications networks

Assignee: Marconi UK Intellectual Property Ltd
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Filing: 1995-09-25
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Granted: —
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Expires: 2015-09-25
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Abstract

Abstract Packet based telecommunications networks are being developed to carry Constant Bit Rate (CBR) data streams between source and destination exchanges in the form of multiplexed packets, which are recombined at the destination exchange into a CBR stream. In such a network it is desirable to synchronise the frequency and maintain the phase relation of the recombined CBR stream with those of a source CBR stream arriving at the source exchange. The described synchronising circuit for use in such a network comprises a local oscillator (46), a local Residual Time Stamp (RTS) generator (50) arranged to determine a local RTS value (51) from the local oscillator frequency, a comparator (52) to determine the difference between the local RTS value (51) and a source RTS value (41) extracted from packets received at a destination exchange (10), and an oscillator controller (54) responsive to the difference to adjust the frequency and phase of the local oscillator to maintain the difference constant.

Inventors

  • 👤 Nigel John Burton

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 02:53
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/062; H04J3/0632; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5614; H04L2012/5616; H04L2012/5638; H04L2012/5646; H04L2012/5652; H04L2012/5672; H04L2012/5674

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 98 words
A synchronising circuit for use in a multiplexed packet based telecommunications network capable of carrying Constant Bit Rate (CBR) data comprising; a local oscillator (46), a local Residual Time Stamp (RTS) generator (50) arranged to determine a local RTS value (51) from the local oscillator frequency, a comparator (52) to determine the difference between the local RTS value (51) and a source RTS value (41) extracted from packets received at a destination exchange (10), and an oscillator controller (54) responsive to the difference to adjust the frequency and phase of the local oscillator to maintain the difference constant.
Claim 2
Dependent Claim 69 words
A synchronising circuit according to claim 1 in which the local RTS generator (50) comprises a counter (32) clocked by means of a clock (26) derived from a network reference frequency (28), a ÷n divider (34) to divide the frequency of the local oscillator (46) by n, the output being connected to actuate a counter reader (32) to read the counter output every n cycles of local oscillator frequency.
Claim 3
Dependent Claim 32 words
A synchronising circuit according to any preceding claim in which the frequency of the local oscillator is adjusted by an amount (defined in bits s⁻¹) equal to the square of the difference.
Claim 4
Dependent Claim 37 words
A synchronising circuit according to any preceding claim in which the phase of the local oscillator is adjusted by an amount (defined in bits) such that the phase stabilises at approximately the same time as frequency synchronisation.
Claim 5
Independent Claim 80 words
A method of synchronising the frequency, and maintaining the phase, of a CBR data stream (12) formed at a destination exchange (10) to that of a source CBR data stream (2), the method comprising: extracting a source Residual Time Stamp (RTS) (41) from a received packet (6), generating a local RTS value (51) from a local oscillator frequency, comparing the source and local RTS values and adjusting the frequency and phase of the local oscillator to maintain the difference constant.
Claim 6
Dependent Claim 24 words
A method according to claim 5 in which the source and local RTS values are generated using the Synchronous Residual Time Stamp (SRTS) method.
Claim 7
Independent Claim 31 words
A method according to claims 5 or 6 in which the frequency of the local oscillator is adjusted by an amount (defined in bits⁻¹) equal to the square of the difference.
Claim 8
Independent Claim 38 words
A method according to claims 5, 6 or 7 in which the phase of the local oscillator is adjusted by an amount (defined in bits) such that the phase stabilises at approximately the same time as frequency synchronisation.

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