Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
201 words
A method for interprocess communication in a microkernel architecture data processing system, comprising the steps of: loading a microkernel including a capability engine module into a memory of the data processing system; forming with said microkernel a first task container in said memory having a set of attributes defining a first communication port and a first set of port rights, and having a pointer to a memory object, said first set of port rights conferring a capability on said first task container to access said memory object; forming with said microkernel a second task container in said memory having a set of attributes defining a second communication port and a second set of port rights; registering in said capability engine, said first set of port rights for said first task container and said second set of port rights for said second task container; comparing said first set of port rights and said second set of port rights in said capability engine; and enabling a transfer with said capability engine, of said pointer and said first port rights from said first task container to said second task container to confer onto said second task container said capability to access said memory object.
Claim 2
Dependent Claim
66 words
A method as claimed in claim 1, wherein: said data processing system comprising in a shared memory multiprocessor system; including a first and a second processor; said first task container has a thread that runs on said first processor; said second task container has a thread that runs on said second processor and the enabling step enables said first processor to communicate with said second processor.
Claim 3
Dependent Claim
261 words
A method as claimed in claim 2, wherein: the first and second processors, each run a microkernel operating system; the method comprising the steps of: loading a first microkernel into a memory of a first processor in a distributed data processing system, said first microkernel including capability engine module; forming with said first microkernel a first task container in said memory having a set of attributes defining a first communication port and a first set of port rights, and having a pointer to a memory object, said first set of port rights conferring a capability on said first task container to access said memory object, said first task container having a thread that runs on said first processor; forming with said first microkernel a second task container in said memory having a set of attributes defining a second communication port and a second set of port rights, said second task container having a thread that runs on an I/O communications processor, said I/O processor coupled by a communications link to a second data processor running a second microkernel operating system; enabling a transfer with said capability engine, of said pointer and said first port rights from said first task container to said second task container to confer onto said second task container said capability to access said memory object, thereby enabling said first processor to communicate with said I/O communications processor; transferring said pointer and said first port rights from said I/O communications processor to said second processor to confer onto said second processor said capability to access said memory object.
Claim 4
Dependent Claim
185 words
A subsystem for interprocess communication in a microkernel architecture data processing system, comprising: a microkernel in a memory of a data processing system, including a capability engine module; a first task container in said memory having a set of attributes defining a first communication port and a first set of port rights, and having a pointer to a memory object, said first set of port rights conferring a capability on said first task container to access said memory object; a second task container in said memory having a set of attributes defining a second communication port and a second set of port rights; said capability engine registering said first set of port rights for said first task container and said second set of port rights for said second task container; said capability engine comparing said first set of port rights and said second set of port rights; and said capability enabling a transfer of said pointer and said first port rights from said first task container to said second task container to confer onto said second task container said capability to access said memory object.
Claim 5
Dependent Claim
64 words
A subsystem as claimed in claim 4 wherein the data processing system comprises in a shared memory multiprocessor system running a microkernel operating system, the multiprocessor system having a first processor and a second processor sharing a memory said second task container has a thread that runs on said second processor; said capability engine enables said first processor to communicate with said second processor.
Claim 6
Dependent Claim
298 words
A subsystem as claimed in claim 5 wherein: the first and second processors are coupled by a communications link and each run a microkernel operating system; a first microkernel in a memory of said first processor, said first microkernel including a capability engine module; a first task container in said memory having a set of attributes defining a first communication port and a first set of port rights, and having a pointer to a memory object, said first set of port rights conferring a capability on said first task container to access said memory object, said first task container having a thread that runs on said first processor; an I/O processor sharing said memory with said first processor, and coupled by said communications link with said second processor; a second task container in said memory having a set of attributes defining a second communication port and a second set of port rights, said second task container having a thread that runs on said I/O communications processor; capability engine registering said first set of port rights for said first task container and said second set of port rights for said second task container; said capability engine comparing said first set of port rights and said second set of port rights; said capability engine enabling a transfer of said pointer and said first port rights from said first task container to said second task container to confer onto said second task container said capability to access said memory object, thereby enabling said first processor to communicate with said I/O communications processor; said second processor running a second microkernel operating system; and said I/O communications processor transferring said pointer and said first port rights to said second processor to confer onto said second processor said capability to access said memory object.
Claim 7
Independent Claim
261 words
A system for interprocess communication in a microkernel architecture, comprising: a memory means in a data processing system, for storing data and programmed instructions; an interprocess communications means in said memory means, for coordinating message passing between tasks in said memory means; a first task in said memory means having a set of attributes defining a first communication port and a first set of port rights, and having a pointer to a memory object, said first set of port rights conferring a capability on said first task to access said memory object; a second task in said memory means having a set of attributes defining a second communication port and a second set of port rights; a processor means coupled to said memory means, for executing said programmed instructions; a first thread in said memory means associated with said first task, for providing said programmed instructions for execution in said processor means; a capability engine means in said interprocess communications means, for registering said first set of port rights for said first task and said second set of port rights for said second task; said thread providing a message from said first task to said interprocess communications means, for providing said pointer to said second task; said capability engine means comparing said first set of port rights and said second set of port rights; and said capability engine means enabling a transfer of said pointer and said first port rights from said first task to said second task to confer onto said second task said capability to access said memory object.
Claim 8
Dependent Claim
15 words
The system of claim 7, which further comprises: said first task represents an application program.
Claim 9
Dependent Claim
17 words
The system of claim 7, which further comprises: said first task represents an operating system personality program.
Claim 10
Dependent Claim
16 words
The system of claim 7, which further comprises: said first task represents a personality-neutral services program.
Claim 11
Dependent Claim
53 words
The system for interprocess communication in a microkernel architecture of claim 19, which further comprises: a second processor means coupled to said memory means, for executing said programmed instructions; a second thread in said memory means associated with said second task, for providing said programmed instructions for execution in said second processor means.
Claim 12
Dependent Claim
83 words
The system of claim 7, which further comprises: said memory means and said processor means being in a first host system of a distributed processor system; a communications link, for coupling said processor means in said first host system to a second host system of said distributed processor system; a second processor means in said second host system, coupled to said processor means in said first host system over said communications link, for exchanging a reference to said pointer over said communications link.