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EP0701278A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semiconductor device and method for manufacturing same

Assignee: Shinko Electric Industries Co Ltd
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Filing: 1995-09-07
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Granted: —
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Expires: 2015-09-07
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Abstract

Abstract A semiconductor device including a package substrate (10) having a surface defining a chip mount area and a peripheral area thereof. A semiconductor chip (12) is mounted on the chip mount area of the package substrate (40). An electrically insulating elastic layer (14) is provided on the peripheral area of the package substrate (10). A wiring pattern film (16) is provided on an outside surface of the elastic layer (14). The wiring pattern film (16) includes a base insulation film (22) and wiring patterns (16e) formed on the base insulation film (22), each of the wiring patterns (16e) having one end being connected with an external connection terminal (18) and the other end being connected with the semiconductor chip (12). The semiconductor chip (12) is sealed with a resin (24) by potting.

Inventors

  • 👤 Michio C/O Shinko Elec. Ind. Co. Ltd. Horiuchi
  • 👤 Yoichi C/O Shinko Elec. Ind. Co. Ltd. Harayama

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 21:51
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/701; H10W70/00; H10W70/60; H10W70/40; H10W70/453; H10W70/456; H10W70/457; H10W72/071; H10W72/077; H10W76/00; H10W76/40; H10W76/42; H10W76/47; H05; H05K; H05K2201/00; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10734; H10W70/67; H10W70/68; H10W70/682; H10W70/685; H10W72/20; H10W72/251; H10W72/252; H10W72/29; H10W72/851; H10W72/874; H10W72/877; H10W74/00; H10W74/10; H10W74/15; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/736; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49004; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 122 words
A semiconductor device comprising: a package substrate having a surface defining a chip mount area and a peripheral area thereof; a semiconductor chip mounted on said chip mount area of the package substrate; an electrically insulating elastic layer provided on said peripheral area of the package substrate, said layer having an outside surface opposite to said package substrate; a wiring pattern film provided on said outside surface of the elastic layer, said wiring pattern film including a base insulation film and wiring patterns formed on said base insulation film, each of said wiring patterns having one end connected to an external connection terminal and the other end connected to said semiconductor chip; and a resin sealing means for sealing said semiconductor chip.
Claim 2
Dependent Claim 94 words
A semiconductor device as set forth in claim 1, wherein said base insulation film of the wiring pattern film includes at least one device hole and a plurality of joint holes at the periphery of said device hole; one end of each of said wiring patterns being exposed in said respective joint holes and the other end of each of said wiring patterns being extended into said device holes; and a face of said wiring pattern film on which said wiring patterns are formed is adhered to said outside surface of the elastic layer.
Claim 3
Dependent Claim 89 words
A semiconductor device as set forth in claim 1 or 2, wherein said base insulation film of the wiring pattern film includes a plurality of joint holes; one end of each of said wiring patterns being exposed in said respective joint holes and the other end of each of said wiring patterns being connected to semiconductor chip connecting portions of said wiring pattern film; and a face of said wiring pattern film on which said wiring patterns are formed is adhered to said outside surface of the elastic layer.
Claim 4
Dependent Claim 23 words
A semiconductor device as set forth in any preceding claim, wherein said elastic layer is composed of an elastic body having rubber elasticity.
Claim 5
Dependent Claim 29 words
A semiconductor device as set forth in claim 4, wherein said elastic layer is made of a silicon rubber or a rubber, the principal component thereof being silicon rubber.
Claim 6
Dependent Claim 47 words
A semiconductor device as set forth in any preceding claim, wherein said package substrate is formed flat, and said elastic layer has a thickness which is larger than a thickness of said semiconductor chip so as to form a cavity in which said semiconductor chip is located.
Claim 7
Dependent Claim 24 words
A semiconductor device as set forth in any preceding claim, wherein said package substrate has a cavity in which said semiconductor chip is located.
Claim 8
Dependent Claim 29 words
A semiconductor device as set forth in any preceding claim, wherein said package substrate is made of one of aluminum nitride ceramic, silicon-carbide ceramic, alumina ceramic, and mullite ceramic.
Claim 9
Dependent Claim 28 words
A semiconductor device as set forth in any preceding claim, wherein said package substrate is made of one of copper, aluminum, copper-aluminum alloy, iron-nickel alloy and iron-cobalt-nickel alloy.
Claim 10
Dependent Claim 26 words
A semiconductor device as set forth in any preceding claim, wherein said base insulation film of the wiring pattern film is made of polyimide or glass-epoxy.
Claim 11
Dependent Claim 18 words
A semiconductor device as set forth in any preceding claim, wherein said external connection terminals are solder balls.
Claim 12
Dependent Claim 34 words
A semiconductor device as set forth in any one of claims 1 to 10, wherein said external connection terminals are lead pins which are adapted for an insertion purpose or a surface mount purpose.
Claim 13
Dependent Claim 72 words
A wiring pattern film adapted to be used for a semiconductor device, said wiring pattern film comprising: a base insulation film having at least one device hole and a plurality of joint holes in a periphery of said device hole; and wiring patterns formed on said base insulation film, each of said wiring patterns having one end exposed in said respective joint hole and the other end extended into said device hole.
Claim 14
Dependent Claim 66 words
A wiring pattern film adapted to be used for a semiconductor device, said wiring pattern film comprising: a base insulation film having a plurality of joint holes and defining a chip connecting area; and wiring patterns formed on said base insulation film, each of said wiring patterns having one end exposed in said respective joint hole and the other end connected to said chip connecting area.
Claim 15
Independent Claim 85 words
A method of manufacturing a semiconductor device comprising the steps of: joining an elastic layer to the periphery of a semiconductor mount portion on a package substrate; joining a wiring pattern film having a wiring pattern connected with a semiconductor chip, to the outside of said elastic layer; joining a back of said semiconductor chip to the package substrate; sealing said semiconductor chip by means of potting; and joining external connection terminals to the respective ends of said wiring patterns on the wiring pattern film.
Claim 16
Dependent Claim 99 words
A method of manufacturing a semiconductor device as set forth in claim 15, further comprising the steps of: forming joint holes and a device hole on said base film of the wiring pattern film: forming wiring patterns on said base film in such a manner that one end of each of the wiring patterns is exposed at the respective joint holes and the other end is extended into said device hole of the wiring pattern film; and joining a face of said wiring pattern film on which the wiring pattern is formed, to the outside of the elastic layer.
Claim 17
Dependent Claim 98 words
A method of manufacturing a semiconductor device as set forth in claim 15 or 16, further comprising the steps of: forming joint holes on said base film of the wiring pattern film; forming wiring patterns on the base film in such a manner that one end of each of the wiring patterns is exposed to the joint holes and the other end is connected to the semiconductor chip connecting portion of the wiring pattern film; and joining a face of said wiring pattern film on which the wiring pattern is formed, to the outside of the elastic layer.
Claim 18
Independent Claim 137 words
A method of manufacturing a semiconductor device comprising the steps of: mounting a semiconductor chip on a wiring pattern film having wiring patterns so that the semiconductor chip is electrically connected to the wiring patterns; conducting a test for the wiring pattern film, on which the semiconductor chip is mounted, to determine whether the semiconductor chip is an acceptable or unacceptable one; joining an elastic layer to a periphery of a semiconductor mount portion on a package substrate: joining the wiring pattern film having the wiring patters connected with the acceptable semiconductor chip, to an outside of said elastic layer; joining a back of said semiconductor chip to the package substrate; sealing said semiconductor chip by means of potting; and joining external connection terminals to respective one ends of said wiring pattern on the wiring pattern film.

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