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EP0677808A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Processing system and method of operation

Assignee: Motorola Solutions Inc
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Filing: 1995-03-31
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Granted: —
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Expires: 2015-03-31
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Abstract

Abstract A processing system and method of operation are provided. In response to a branch instruction, a first instruction is processed so that a storage location is associated with the first instruction prior to execution of the branch instruction. In response to execution of the branch instruction, a second instruction is processed so that the storage location is associated with the second instruction prior to completion of the branch instruction.

Inventors

  • 👤 Marvin Ansel Denman
  • 👤 Artie Atwell Pennington
  • 👤 Seungyoon Peter Song

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 05:49
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3861; G06F9/3863; G06F9/3836; G06F9/3838; G06F9/384; G06F9/3854; G06F9/3856; G06F9/3858

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 70 words
A method of operating a processing system, comprising the steps of: in response to a branch instruction, processing a first instruction so that a storage location is associated with said first instruction prior to execution of said branch instruction; and in response to execution of said branch instruction, processing a second instruction so that said storage location is associated with said second instruction prior to completion of said branch instruction.
Claim 2
Dependent Claim 15 words
The method of Claim 1 wherein said storage location is a rename buffer storage location.
Claim 3
Dependent Claim 15 words
The method of Claim 1 wherein said storage location is a reorder buffer storage location.
Claim 4
Dependent Claim 14 words
The method of Claim 1 wherein said branch instruction is a conditional branch instruction.
Claim 5
Dependent Claim 38 words
The method of Claim 1 wherein said step of processing said second instruction comprises the step of processing said second instruction in response to execution of said branch instruction indicating said first instruction is not to be processed.
Claim 6
Dependent Claim 25 words
The method of Claim 1 wherein said first and second instructions respectively belong to first and second target sequences of instructions of said branch instruction.
Claim 7
Dependent Claim 84 words
The method of Claim 1 and further comprising the steps of: in response to an additional branch instruction, processing a third instruction so that an additional storage location is associated with said third instruction prior to execution of said additional branch instruction; and in response to execution of said additional branch instruction, processing a fourth instruction so that said additional storage location is associated with said fourth instruction prior to completion of said additional branch instruction and prior to execution of said branch instruction.
Claim 8
Dependent Claim 71 words
A processing system, comprising: at least one storage location; and circuitry for: processing a first instruction in response to a branch instruction so that said storage location is associated with said first instruction prior to execution of said branch instruction; and processing a second instruction in response to execution of said branch instruction so that said storage location is associated with said second instruction prior to completion of said branch instruction.
Claim 9
Dependent Claim 15 words
The system of Claim 8 wherein said storage location is a rename buffer storage location.
Claim 10
Dependent Claim 15 words
The system of Claim 8 wherein said storage location is a reorder buffer storage location.
Claim 11
Dependent Claim 14 words
The system of Claim 8 wherein said branch instruction is a conditional branch instruction.
Claim 12
Dependent Claim 32 words
The system of Claim 8 wherein said circuitry is operable to process said second instruction in response to execution of said branch instruction indicating said first instruction is not to be processed.
Claim 13
Dependent Claim 25 words
The system of Claim 8 wherein said first and second instructions respectively belong to first and second target sequences of instructions of said branch instruction.
Claim 14
Dependent Claim 84 words
The system of Claim 8 wherein said circuitry is operable to: process a third instruction in response to an additional branch instruction so that an additional storage location is associated with said third instruction prior to execution of said additional branch instruction; and process a fourth instruction in response to execution of said additional branch instruction so that said additional storage location is associated with said fourth instruction prior to completion of said additional branch instruction and prior to execution of said branch instruction.

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