Method and apparatus for sequential cancellation of multiple access interference in a CDMA receiver

Claim 2

The method of claim 1, wherein said steps (c) through (f) are repeated in consecutive stages, including at least a first stage and a last stage, with at least one repetition of said steps (c) through (f) per symbol in each stage.

Claim 3

The method of claim 2 wherein, in said first stage, said step (d) comprises correlating said despreading code with said baseband signal.

Claim 4

The method of claim 3 wherein, in said first stage, said step (d) comprises limiting said estimated symbol value in absolute value.

Claim 5

The method of claim 4 wherein, in said first stage, said step (d) comprises multiplying said estimated symbol value by a constant in addition to limiting said estimated symbol value in absolute value.

Claim 6

The method of claim 3 wherein, in said first stage, said step (d) comprises dividing said estimated symbol value by an average absolute value of a certain number of estimated symbol values, to maintain a substantially constant average absolute value over said number of estimated symbol values.

Claim 7

The method of claim 2 wherein, in said first stage, said step (e) comprises spreading said estimated symbol value by said spreading code.

Claim 8

The method of claim 2 wherein, in said stages other than said first stage, said step (d) comprises: correlating said despreading code with said baseband signal to produce a residual symbol value; and adding said residual symbol value to an estimated symbol value produced in a preceding stage.

Claim 9

The method of claim 8 wherein, in stages other than said first stage, said step (e) comprises spreading said residual symbol value by said spreading code.

Claim 10

The method of claim 2 wherein, in said stages other than said first stage, said step (d) comprises: correlating said despreading code with said baseband signal to produce a first residual symbol value; adding said first residual symbol value to an estimated symbol value produced in a preceding stage, thereby producing a preliminary symbol value; and limiting said preliminary symbol value in absolute value, thereby producing said estimated symbol value.

Claim 11

The method of claim 10 wherein, in said first stage, said step (d) also comprises multiplying said preliminary symbol value by a constant.

Claim 12

The method of claim 10 wherein, in said first stage, said step (d) also comprises dividing said preliminary symbol value by an average absolute value of a certain number of preliminary symbol values, to maintain a constant average absolute value over said number of preliminary symbol values.

Claim 13

The method of claim 10 wherein, in said stages other than said first stage, said step (e) comprises subtracting, from said estimated symbol value, said estimated symbol value produced in a preceding stage, thereby producing a second residual symbol value; and spreading said second residual symbol value by said spreading code.

Claim 14

The method of claim 2, comprising the further steps of: (h) respreading an estimated symbol value estimated in said step (d) in said last stage, thereby producing a respread signal; (i) adding said baseband signal to said respread signal, thereby producing a sum signal; and (j) correlating said sum signal with a despreading code.

Claim 15

The method of claim 14, wherein said steps (h), (i), and (j) are carried out for all estimated symbol values generated in said step (d) in said last stage.

Claim 16

The method of claim 1, wherein said step (a) produces two baseband signals, and said steps (b) through (g) are carried out separately for both of said baseband signals, with pairs of resulting estimated symbol values being combined after all repetitions of said steps (c) through (f).

Claim 17

The method of claim 2, wherein said steps (b) through (f) are carried out multiple times for a single symbol in each of said stages from said first stage to said last stage, to provide path diversity, and resulting final estimated symbol values for said symbol are combined.

Claim 18

A code-division multiple-access receiver for receiving a code-division multiple-access signal combining signals of a plurality of stations, each station having a different spreading code and a corresponding despreading code, comprising: a front-end circuit (2) for converting said code-division multiple-access signal to a baseband signal; a controller (3) coupled to said front-end circuit (2), for recognizing symbol boundaries in said baseband signal; and a baseband processor (4 or 64) coupled to said front-end circuit (2), for receiving said baseband signal, storing successive one-symbol portions of said baseband signal, despreading said one-symbol portions of said baseband signal to generate estimated symbol values, respreading said estimated symbol values to generate estimated interference signals, and modifying said baseband signal by subtracting said estimated interference signals, these processes of despreading, respreading, and modifying being carried out in a cyclic order responsive to symbol boundaries recognized by said controller (3).

Claim 19

The receiver of claim 18, wherein said baseband processor (4 or 64) comprises a first interference-canceling stage (5 or 65) having a plurality of interference cancelers (10 or 71) for generating estimated symbol values of respective stations, including at least one interference canceler (10, 71) for each of said stations.

Claim 20

The receiver of claim 19, wherein said first interference-canceling stage (5, 65) comprises more than one interference canceler (10, 71) per station, thereby providing path diversity by estimating separate values for a symbol that arrives via different paths with different delays.

Claim 21

The receiver of claim 19, wherein each interference canceler (10, 71) in said first interference-canceling stage (5, 65) separately comprises: a code generator (24) for generating a spreading code and a despreading code of one of said stations; a correlator (26) for correlating said despreading code with a one-symbol portion of said baseband signal, thereby generating an estimated symbol value; a multiplier (30) for respreading said estimated symbol value, using said spreading code, thereby generating an estimated interference signal; and a subtractor (32) for subtracting said estimated interference signal from said one-symbol portion of said baseband signal.

Claim 22

The receiver of claim 21, wherein each interference canceler (71) in said first interference-canceling stage (65) also comprises an adjustment processor (78) for adjusting said estimated symbol value.

Claim 23

The receiver of claim 22, wherein said adjustment processor (78) comprises a gain adjustment processor (81) for dividing said estimated symbol value by an average absolute value of a certain number of estimated symbol values generated by said correlator (26).

Claim 24

The receiver of claim 22, wherein said data adjustment processor (78) comprises a symbol adjustment processor (82) for multiplying said estimated symbol value by a constant value.

Claim 25

The receiver of claim 22, wherein said data adjustment processor (78) comprises a limiter (83) for limiting said estimated symbol value to a certain maximum absolute value.

Claim 26

The receiver of claim 19, wherein: said baseband processor comprises a plurality of interference-canceling stages, including at least said first interference-canceling stage (5, 64) and a last interference-canceling stage (7, 67), coupled in series; said baseband signal is passed through said series from said first interference-canceling stage (5, 65) toward said last interference-canceling stage (7, 67); each interference-canceling stage other than said first interference-canceling stage (5, 65) comprises a plurality of interference cancelers (10, 71) for generating estimated symbol values of respective stations, including at least one interference canceler (10, 71) for each of said stations; and each interference-canceling stage other than said first interference-canceling stage (5, 65) receives, as old estimated symbol values, the estimated symbol values generated in a preceding interference-canceling stage in said series.

Claim 27

The receiver of claim 26, wherein each interference-canceling stage other than said first interference-canceling stage (5, 65) comprises more than one interference canceler (10, 71) per station, thereby providing path diversity by estimating separate values for a symbol that arrives via different paths with different delays.

Claim 28

The receiver of claim 26, wherein each interference canceler (10) in interference-canceling stages other than said first interference-canceling stage (5) separately comprises: a code generator (24) for generating a spreading code and a despreading code of one of said stations; a correlator (26) for correlating said despreading code with a one-symbol portion of said baseband signal, thereby producing a residual symbol value; an adder (28) for adding said residual symbol value to an old estimated symbol value received from a preceding interference-canceling stage, thereby producing the estimated symbol value generated by said interference canceler (10); a multiplier (30) for respreading said residual symbol value, using said spreading code, thereby generating an estimated interference signal; and a subtractor (32) for subtracting said estimated interference signal from said one-symbol portion of said baseband signal.

Claim 29

The receiver of claim 26, wherein each interference canceler (71) in interference-canceling stages other than said first interference-canceling stage (65) separately comprises: a code generator (24) for generating a spreading code and a despreading code of one of said stations; a correlator (26) for correlating said despreading code with a one-symbol portion of said baseband signal, thereby producing a first residual symbol value; a first adder (28) for adding said first residual symbol value to an old estimated symbol value received from a preceding interference-canceling stage, thereby producing a preliminary symbol value; an adjustment processor (78) for adjusting said preliminary symbol value, thereby producing the estimated symbol value generated by said interference canceler (71); a first subtractor (80) for subtracting from said estimated symbol value the old estimated symbol value received from said preceding interference-canceling stage, thereby producing a second residual symbol value; a multiplier (30) for respreading said second residual symbol value, using the spreading code output by said code generator (24), thereby generating an estimated interference signal; and a second subtractor (32) for subtracting said estimated interference signal from said baseband signal.

Claim 30

The receiver of claim 29, wherein said adjustment processor (78) comprises a gain adjustment processor (81) for dividing said preliminary symbol value by an average absolute value of a certain number of preliminary symbol values generated by said first adder (28).

Claim 31

The receiver of claim 29, wherein said data adjustment processor (78) comprises a symbol adjustment processor (82) for multiplying said preliminary symbol value by a constant value.

Claim 32

The receiver of claim 29, wherein said data adjustment processor (78) comprises a limiter (83) for limiting said preliminary symbol value to a certain maximum absolute value.

Claim 33

The receiver of claim 19, wherein said baseband processor has no interference-canceling stages other than said first interference-canceling stage (5, 65), further comprising: a respreader (68) for respreading the estimated symbol value generated by at least one of the interference cancelers (10, 71) in said first interference-canceling stage (5, 65) by a corresponding spreading code, thereby generating at least one respread signal; a final adjustment processor (69) for adding a one-symbol portion of said baseband signal, after modification by said first interference-canceling stage (5, 65), to said respread signal, thereby generating a sum signal; a final correlator (70) for correlating said sum signal with a corresponding despreading code, thereby generating a final estimated symbol value; and a decoder (9) for decoding said final estimated symbol value.

Claim 34

The receiver of claim 33, wherein said respreader (68), said final adjustment processor (69), said final correlator (70), and said decoder (9) operate as described in claim 33 on all estimated symbol values generated in said first interference-canceling stage (5, 65).

Claim 35

The receiver of claim 26, comprising: a respreader (68) for respreading the estimated symbol value generated by at least one of the interference cancelers (10, 71) in said last stage (7, 67) by a corresponding spreading code, thereby generating at least one respread signal; a final adjustment processor (69) for adding a one-symbol portion of said baseband signal, after modification by said last interference-canceling stage (7, 67), to said respread signal, thereby generating a sum signal; a final correlator (70) for correlating said sum signal with a corresponding despreading code, thereby generating a final estimated symbol value; and a decoder (9) for decoding said final estimated symbol value.

Claim 36

The receiver of claim 35, wherein said respreader (68), said final adjustment processor (69), said final correlator (70) and said decoder (9) operate as described in claim 35 on all estimated symbol values generated in said last interference-canceling stage (7, 67).

Claim 37

The receiver of claim 18, comprising a decoder (9) for decoding at least one of the estimated symbol values generated by said baseband processor (4, 64) to determine data transmitted by at least one of said stations.

Claim 38

The receiver of claim 37, wherein said decoder (9) comprises a Viterbi decoder (57).

Claim 39

The receiver of claim 26, comprising a decoder (9) coupled to said last interference-canceling stage (7, 67), for decoding at least one of the estimated symbol values generated by said last interference-canceling stage (7, 67), thus determining data transmitted by at least one of said stations.

Claim 40

The receiver of claim 39, wherein said decoder (9) decodes all of the estimated symbol values generated in said last interference-canceling stage (7, 67).

Claim 41

The receiver of claim 18, comprising a pair of baseband processors (4 or 64) as described in claim 18, wherein said front-end circuit (2) generates a pair of baseband signals, which are provided to respective baseband processors and processed as described in claim 18.

Claim 42

The receiver of claim 41, comprising a combining circuit for combining pairs of estimated symbol values output by respective baseband processors (4 or 64).

Claim 43

The receiver of claim 18, comprising a path-combining processor for combining different estimated symbol values generated by said baseband processor (4, 64) for a single station due to path diversity.

Claim 44

The receiver of claim 18, wherein said front-end circuit (2) receives a radio-frequency code-division multiple-access signal from an antenna (1) and converts it to said baseband signal.

Claim 45

The receiver of claim 18, wherein said front-end circuit (2) receives a radio-frequency code-division multiple-access signal from a power line and converts it to said baseband signal.

Claim 46

The receiver of claim 18, wherein said front-end circuit (2) receives an optical code-division multiple-access signal and converts it to an electrical baseband signal.

Claim 47

The receiver of claim 18, wherein said front-end circuit (2) receives an acoustic code-division multiple-access signal and converts it to an electrical baseband signal.

Claim 48

A code-division multiple-access receiver for receiving a code-division multiple-access signal combining signals of a plurality of stations, each station having a different spreading code and a corresponding despreading code, comprising: a front-end circuit (2) for converting said code-division multiple-access signal to a baseband signal; a shift register (100) coupled to said front-end circuit (2), for receiving, storing, and shifting said baseband signal; a controller (3) coupled to said front-end circuit (2), for recognizing symbol boundaries in said baseband signal; a symbol memory (103) for storing estimated symbol values; and a baseband processor (102) coupled to said shift register (100) and said symbol memory (103), for reading from said shift register (100) a part of said baseband signal corresponding to one symbol, generating a spreading code by which said symbol was spread, generating a corresponding despreading code, using said part of said baseband signal and said despreading code to generate an estimated symbol value, storing said estimated symbol value in said symbol memory (103), using said spreading code to generate an estimated interference signal, and modifying said part of said baseband signal in said shift register (100) by subtracting said estimated interference signal.

Claim 49

The receiver of claim 48, wherein said baseband processor (102) comprises an interference canceler (104) having: a code generator (24) for generating said spreading code and said corresponding despreading code; a correlator (26) for correlating said despreading code with said part of said baseband signal, thereby producing a residual symbol value; an adder (28) for adding said residual symbol value to an old estimated symbol value stored in said symbol memory (103), thereby generating the estimated symbol value referred to in claim 48, which is stored in said symbol memory in place of said old estimated symbol value; a multiplier (30) for respreading said residual symbol value, using the spreading code output by said code generator (24), thereby generating said estimated interference signal; and a subtractor (32) for subtracting said estimated interference signal from said part of said baseband signal.

Claim 50

The receiver of claim 48, wherein said baseband processor comprises an interference canceler (104) having: a code generator (24) for generating said spreading code and said corresponding despreading code; a correlator (26) for correlating said despreading code with said part of said baseband signal, thereby producing a first residual symbol value; a first adder (28) for adding said first residual symbol value to an old estimated symbol value stored in said symbol memory (103), thereby producing a preliminary symbol value; an adjustment processor (78) for adjusting said preliminary symbol value to produce a new estimated symbol value; a first subtractor (80) for subtracting said old estimated symbol value from said new estimated symbol value, thereby producing a second residual symbol value; a multiplier (30) for respreading said second residual symbol value, using the spreading code output by said code generator (24), thereby generating said estimated interference signal; and a second subtractor (32) for subtracting said estimated interference signal from said part of said baseband signal; said new estimated symbol value being stored in said symbol memory (103) in place of said old estimated symbol value.

Claim 51

The receiver of claim 50, wherein said adjustment processor (78) comprises a gain adjustment processor (81) for dividing said preliminary symbol value by an average absolute value of a certain number of preliminary symbol values produced by said first adder (28).

Claim 52

The receiver of claim 50, wherein said data adjustment processor (78) comprises a symbol adjustment processor (82) for multiplying said preliminary symbol value by a constant value.

Claim 53

The receiver of claim 50, wherein said data adjustment processor (78) comprises a limiter (83) for limiting said new estimated symbol value to a certain maximum absolute value.

Claim 54

The receiver of claim 48, wherein said baseband processor (102) also comprises: a respreader (106) for respreading an estimated symbol value stored in said symbol memory (103), using a spreading code of a corresponding station, thereby producing a respread signal; a final adjustment processor (107) for adding a final part of the baseband signal stored in said shift register (100) to said respread signal, thereby producing a sum signal; and a final correlator (108) for correlating said sum signal with the despreading code of said corresponding station, thereby generating an adjusted value of the estimated symbol value respread by said respreader (106).

Claim 55

The receiver of claim 48, wherein: said shift register (100) is divided into stages (101), each stage holding a part of said baseband signal corresponding to one symbol.

Claim 56

The receiver of claim 55, wherein said symbol memory (103) stores one estimated symbol value per station for each of said stages.

Claim 57

The receiver of claim 55, wherein said symbol memory (103) stores more than one estimated symbol value per station for each of said stages (101), thereby providing path diversity.

Claim 58

The receiver of claim 55, comprising a decoder for decoding estimated symbol values stored in said symbol memory (103) which correspond to the baseband signal stored in a last stage (101 K+1 ) of said shift register (100).

Claim 59

The receiver of claim 48, wherein said despreading codes are identical to said spreading codes.