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EP0675501A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Non-volatile memory element with double programmable cell and corresponding reading circuit for redundancy circuits

Assignee: STMicroelectronics SRL
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Filing: 1994-03-31
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Granted: —
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Expires: 2014-03-31
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Abstract

Abstract A non-volatile memory element with dual programmable cells and associated read circuit, which comprises a circuit (LATCH) of the bistable type connected between the two memory cells, to which it is coupled through first and second switching circuit elements (SW1, SW2). Such switching elements enable a single initial write step by one of the two memory cells only, and thereafter, enable connection of the clear cell and the programmed cell to the bistable circuit.

Inventors

  • 👤 Paolo Rolandi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 05:53
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0441; G11C14/00; G11C16/06; G11C16/26; G11C29/00; G11C29/70; G11C29/78

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 112 words
A memory element of the programmable type with a read circuit featuring zero consumption in the quiescent state which comprises a circuit (LATCH) of the bistable type having at least first and second terminals, characterized in that the memory element comprises first (CL1) and second (CL2) non-volatile memory cells of the programmable type, with the bistable-type circuit being connected between said cells with its first and second terminals and coupled thereto through a first (SW1) and a second (SW2) switching circuit element, respectively, which switching elements are operative to connect the first and second memory cells to programming circuit means during a write step, and to the bistable-type circuit during read-only steps.
Claim 2
Dependent Claim 27 words
A memory element according to Claim 1, characterized in that at least one of said first and second memory cells is left clear after the write step.
Claim 3
Dependent Claim 23 words
A memory element according to either Claim 1 or 2, characterized in that the first and second switching circuit elements are electronic switches.
Claim 4
Dependent Claim 17 words
A memory element according to Claim 3, characterized in that the electronic switches comprise mutually complementary transistors.
Claim 5
Dependent Claim 26 words
A memory element according to any of the preceding claims, characterized in that the first and second non-volatile memory cells are of the field-effect transistor type.
Claim 6
Dependent Claim 44 words
A memory element according to any of the preceding claims, characterized in that the bistable-type circuit comprises first and second inverters connected in a loop, the first and second terminals of that bistable-type circuit being circuit linking nodes between the first and second inverters.
Claim 7
Dependent Claim 36 words
A non-volatile storage device of the redundant memory element type, characterized in that it comprises at least one memory element as claimed in any of the preceding claims, employed in a redundancy circuit for the device.
Claim 8
Independent Claim 89 words
A method for storing redundancy address information into a programmable non-volatile storage device, characterized by the use of a pair of memory cells of the non-volatile type, of which at least one is held clear during the write step when the cells are connected to programming sections by switching circuit means, and in that such memory cells are held, during the read-only step, connected to first and second terminals of a bistable-type circuit through said switching circuit means, said bistable-type circuit being coupled to processing sections of the device.

References Cited (Backward Citations)

WO1990012402A1 Cited

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