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EP0670552A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Design automation method for digital electronic circuits

Assignee: Fujitsu Services Ltd
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Filing: 1994-12-14
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Granted: —
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Expires: 2014-12-14
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Abstract

Abstract A design automation method for digital electronic circuits, including the steps of synthesizing a circuit including at least one logic tree, and then automatically partitioning the logic tree. The automatic partitioning process involves first identifying a set of driving bits for each of a set of points within the tree, ie the tree inputs that affect each of those points. Then, for each of those points, the partitioning process identifies a set of splittable input bits that can be isolated by insertion of a fence register at that point, and identifies which of those points are possible fence points, having more than one splittable input bit. Finally, the partitioning process selects a sub-set of the possible fence points, sufficient to reduce the number of inputs to the logic tree to a value less than a predetermined limit, and inserts fence registers at those points. In this way, the number of inputs to the logic tree can be made small enough (e.g. 17 or less) to allow exhaustive testing of the circuit.

Inventors

  • 👤 Leonard Theobald

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 11:13
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3183; G01R31/318392

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 109 words
A method of automatically partitioning a logic tree, comprising the steps: (a) identifying a set of driving bits for each of a set of points within the tree; (b) for each of said set of points, identifying a set of splittable input bits that can be isolated by insertion of a fence register at that point; (c) identifying which of said points are possible fence points, having more than one splittable input bit; and (d) selecting a sub-set of said possible fence points, sufficient to reduce the number of inputs to the logic tree to a value less than a predetermined limit, and inserting fence registers at those points.
Claim 2
Dependent Claim 77 words
A method according to Claim 1 wherein the step of identifying the set of splittable bits at a point comprises: (a) using a first method involving a local analysis of the driving bits and splittable bits in the vicinity of that point to derive the set of splittable bits for that point; and (b) if the first method fails, using a second method involving an analysis of the driving bits in a cross-section of the whole tree.
Claim 3
Independent Claim 41 words
A method according to either preceding claim including a further step of optimizing the set of fence points, by replacing two or more fences in one level of the tree by a single fence at a higher level of the tree.
Claim 4
Dependent Claim 137 words
A design automation method for digital electronic circuits, including the steps of synthesizing a circuit design including at least one logic tree, and then automatically partitioning said logic tree by means of an automatic partitioning method comprising the steps: (a) identifying a set of driving bits for each of a set of points within the tree; (b) for each of said set of points, identifying a set of splittable input bits that can be isolated by insertion of a fence register at that point; (c) identifying which of said points are possible fence points, having more than one splittable input bit; and (d) selecting a sub-set of said possible fence points, sufficient to reduce the number of inputs to the logic tree to a value less than a predetermined limit, and inserting fence registers at those points.
Claim 5
Dependent Claim 77 words
A method according to Claim 4 wherein the step of identifying the set of splittable bits at a point comprises: (a) using a first method involving a local analysis of the driving bits and splittable bits in the vicinity of that point to derive the set of splittable bits for that point; and (b) if the first method fails, using a second method involving an analysis of the driving bits in a cross-section of the whole tree.
Claim 6
Dependent Claim 42 words
A method according to Claim 4 or 5 including a further step of optimizing the set of fence points, by replacing two or more fences in one level of the tree by a single fence at a higher level of the tree.
Claim 7
Dependent Claim 20 words
A computer system, arranged to perform a design automation method in accordance with any one of Claims 4 to 6.
Claim 8
Dependent Claim 18 words
A digital electronic circuit, designed by a method in accordance with any one of Claims 4 to 6.

References Cited (Backward Citations)

EP0444806A2 Cited

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