EP0668680A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Address tracking over repeater based networks
Assignee: Advanced Micro Devices Inc
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Filing: 1995-01-20
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Granted: —
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Expires: 2015-01-20
Abstract
Abstract A system is provided for use in a network to provide authentication of packets of data, provide security to ensure the prevention of unauthorized receipt of data, to provide improved monitoring of the packets of data transmitted and received over such a network, and to detect changes in the network topology. Repeaters utilized in the network are provided with the capability to detect and interpret packet data and the source address (SA) and destination address (DA) fields to provide the improved features.
Inventors
- 👤 Nader Vijeh
- 👤 Ian S. Crayford
- 👤 William Lo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 08:47
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/40; H04L12/40052; H04L12/40071; H04L63/00; G; G06; G06F; G06F11/00; G06F11/30; G06F11/34; G06F11/3466; G06F11/3471; H04L12/02; H04L12/22; H04L12/40097; H04L12/46; H04L12/4604; H04L12/462; H04L12/4625; H04L63/08
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
149 words
A repeater including a plurality of ports that transmits a plurality of packets of data, each one of the plurality of packets including a source address (SA) field and a destination address (DA) field, the repeater including a plurality of repeater circuits, the repeater comprising: a bus for interconnecting the plurality of repeater circuits, at least one of the repeater circuits including a system for the tracking and validating source addresses (SAs) coupled to the plurality of ports, the system further comprising: means for storing a value representation of a SA field; means for receiving a packet and extracting a value representation of the SA field from the received packet; and means coupled to the storing means and to the receiving means for comparing the extracted SA value representation to the stored SA value representation, wherein a signal is provided responsive to the comparison indicating a match or mismatch.
Claim 2
Dependent Claim
20 words
The repeater of claim 1 wherein the data on the bus is not disrupted by the plurality of repeater circuits.
Claim 3
Dependent Claim
18 words
The repeater of claim 1 in which the storing means comprises a plurality of random access memories (RAMs).
Claim 4
Dependent Claim
17 words
The repeater of claim 3 in which each of the plurality of RAMs is 32 bits wide.
Claim 5
Dependent Claim
23 words
The repeater of claim 1 in which the stored value SA field is representation of the written into memory through an external interface.
Claim 6
Dependent Claim
24 words
The repeater of claim 1 in which the stored value representation of the SA field is automatically updated when a valid frame is received.
Claim 7
Dependent Claim
123 words
A repeater, including a plurality of ports, that receives and transmits and receives a plurality of packets of data, each one of the plurality of packets including a source address (SA) field and a destination address (DA) field, the repeater including a plurality of repeater circuits the repeater comprising: a bus for interconnecting the plurality of repeater circuits, at least one of the repeater circuits including a system for tracking Destination Addresses (DAs) coupled to the plurality of ports, the system further comprising: means for receiving a DA field; means for storing a plurality of addresses representing ports coupled to the repeater; comparing the DA field to the plurality of addresses; and means for disrupting the packet if there is not a match.
Claim 8
Dependent Claim
20 words
The repeater of claim 7 wherein the data on the bus is not disrupted by the plurality of repeater circuits.
Claim 9
Dependent Claim
29 words
The repeater of claim 7 which includes means coupled to the disrupting means for preventing the disrupting of a packet when the packet is a multicast or broadcast format.
Claim 10
Dependent Claim
144 words
A repeater, including a plurality of ports, that receives and transmits a plurality of packets of data, each one of the plurality of packets including a source address field and a destination address field, the repeater also including a plurality of repeater circuits, the repeater comprising: a bus for interconnecting the plurality of repeater circuits, at least one of the repeater circuits further including a system coupled to the plurality of ports for tracking and validating addresses, the system further comprising: means for storing an address into the system; means for receiving an address representing an incoming packet from a port; means for comparing the stored addresses with the addresses representing an incoming packet; means for providing an interrupt signal indicating a match between the stored address and the incoming address; means for providing the identity of the port on which the match occurred.
Claim 11
Dependent Claim
20 words
The repeater of claim 1 wherein the data on the bus is not disrupted by the plurality of repeater circuits.
References Cited (Backward Citations)
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