EP0639029A2 — Apparatus for converting frame format of televisi…

Claim 1

Independent Claim 394 words

An apparatus for converting a frame format of a television signal, comprising: scanning format conversion means for converting a scanning format of an input video signal into a progressive scanning type if it is of an interlaced scanning type; scanning line conversion means for converting the number of vertical scanning lines of an output video signal from said scanning format conversion means into that of a display format, said scanning line conversion means including 3:4 line conversion means for converting the number of the vertical scanning lines of the video signal from said scanning format conversion means into 1050 if its is 787.5, 4:3 line conversion means for converting the number of the vertical scanning lines of the video signal from said scanning format conversion means into 787.5 if it is 1050, 2:1 line conversion means for converting the number of the vertical scanning lines of the video signal from said scanning format conversion means into 525 if it is 1050 and 3:2 line conversion means for converting the number of the vertical scanning lines of the video signal from said scanning format conversion means into 525 if it is 787.5; horizontal pixel conversion means for converting the number of horizontal pixels of an output video signal from said scanning line conversion means into that of the display format, said horizontal pixel conversion means including 3:4 pixel conversion means for converting the number of horizontal pixels of an output video signal from said 3:4 line conversion means in said scanning line conversion means at a ratio of 3:4, 4:3 pixel conversion means for converting the number of horizontal pixels of an output video signal from said 4:3 line conversion means in said scanning line conversion means at a ratio of 4:3, 2:1 pixel conversion means for converting the number of horizontal pixels of an output video signal from said 2:1 line conversion means in said scanning line conversion means at a ratio of 2:1 and 3:2 pixel conversion means for converting the number of horizontal pixels of an output video signal from said 3:2 line conversion means in said scanning line conversion means at a ratio of 3:2; and format control means for controlling said scanning format conversion means, said scanning line conversion means and said horizontal pixel conversion means to convert a frame format of the input video signal into the display format.

Claim 2

Dependent Claim 102 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 1, wherein said scanning format conversion means includes: line average calculation means for delaying the input video signal and calculating an average of pixels in the same positions of upper and lower lines of the input video signal; a first FIFO memory for storing temporarily the delayed video signal from said line average calculation means; a second FIFO memory for storing temporarily the calculated average from said line average calculation means; and a multiplexer for selecting alternately output signals from said first and second FIFO memories.

Claim 3

Dependent Claim 91 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 2, wherein said line average calculation means includes: a line memory for storing and delaying the input video signal in the unit of line and outputting the delayed video signal to said first FIFO memory; an adder for adding the delayed video signal from said line memory to the input video signal; and a divider for dividing an output signal from said adder by 2 and outputting the divided signal to said second FIFO memory.

Claim 4

Dependent Claim 137 words

An apparatus as set forth in Claim 1, 2 or 3, wherein said scanning format conversion means includes: frame average calculation means for calculating an average of pixels in the same positions of preceding and following frames of the input video signal; line average calculation means for calculating an average of pixels in the same positions of upper and lower lines of the input video signal; motion detection means for detecting a motion of the input video signal in response to output signals from said frame average calculation means and said line average calculation means; and output signal selection means for selecting one of the output signals from said frame average calculation means and said line average calculation means under control of said motion detection means and outputting alternately the selected signal and the input video signal.

Claim 5

Dependent Claim 92 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 4, wherein said frame average calculation means includes: a first field memory for storing the input video signal in the unit of field; a second field memory for storing an output signal from said first field memory in the unit of the field; a first adder for adding an output signal from said second field memory to the input video signal; and a first divider for dividing an output signal from said first adder by 2.

Claim 6

Dependent Claim 86 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 5, wherein said line average calculation means includes: a line memory for storing and delaying the output signal from said first field memory in said frame average calculation means in the unit of line; a second adder for adding an output signal from said line memory to the output signal from said first field memory; and a second divider for dividing an output signal from said second adder by 2.

Claim 7

Dependent Claim 144 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 6, wherein said motion detection means includes: a first subtracter for calculating a difference between the output signal from said first field memory in said frame average calculation means and the output signal from said line memory in said line average calculation means; a second subtracter for calculating a difference between an output signal from said first divider in said frame average calculation means and an output signal from said second divider in said line average calculation means; a first comparator for comparing an output signal from said first subtracter with a first predetermined threshold value; a second comparator for comparing an output signal from said second subtracter with a second predetermined threshold value; and an AND gate for ANDing output signals from said first and second comparators.

Claim 8

Dependent Claim 110 words

An apparatus as set forth in Claim 6 or 7, wherein said output signal selection means includes: a first multiplexer for selecting one of the output signal from said first divider in said frame average calculation means and the outputs signal from said second divider in said line average calculation means under the control of said motion detection means; a first FIFO memory for storing temporarily an output signal from said first multiplexer; a second FIFO memory for storing temporarily the output signal from said line memory in said line average calculation means; and a second multiplexer for selecting one of output signals from said first and second FIFO memories.

Claim 9

Independent Claim 75 words

An apparatus as set forth in any one of Claims 1 to 8, wherein said 3:4 line conversion means includes: filtering means for delaying and filtering the video signal from said scanning format conversion means; signal output means for selecting one of a plurality of output signals from said filtering means; and output control means for controlling said signal output means in response to input/output line clocks for controlling input/output timing of the video signal.

Claim 10

Dependent Claim 121 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 9, wherein said filtering means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line and outputting the delayed video signal to said signal output means; an adder for adding an output signal from said line memory to the video signal from said scanning format conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of pixels in the same positions of adjacent lines of the video signal from said scanning format conversion means and outputting the divided signal to said signal output means.

Claim 11

Dependent Claim 74 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 10, wherein said signal output means includes: a first FIFO memory for storing temporarily the output signal from said line memory in said filtering means; a second FIFO memory for storing temporarily an output signal from said divider in said filtering means; and a multiplexer for selecting one of output signals from said first and second FIFO memories.

Claim 12

Dependent Claim 143 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 11, wherein said output control means includes: a first line counter for counting the output line clock in the unit of 2 bits, a second line counter for counting the input line clock in the unit of the 2 bits; an OR gate for ORing two output bits from said first line counter and outputting the ORed signal to said second FIFO memory and said multiplexer in said signal output means; a NOR gate for NORing two output bits from said second line counter and outputting the NORed signal to said first FIFO memory in said signal output means; and a NOT gate for inverting an output signal from said OR gate and outputting the inverted signal to said first FIFO memory in said signal output means.

Claim 13

Independent Claim 69 words

An apparatus as set forth in any one of Claims 1 to 12, wherein said 3:4 pixel conversion means includes: filtering means for delaying and filtering the video signal from said 3:4 line conversion means; a 1:3 demultiplexer for 1:3-demultiplexing the filtered video signal from said filtering means; and a 4:1 multiplexer for 4:1-multiplexing the delayed video signal from said filtering means and output signals from said 1:3 demultiplexer.

Claim 14

Dependent Claim 111 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 13, wherein said filtering means includes: a latch for storing and delaying the video signal from said 3:4 line conversion means in the unit of pixel and outputting the delayed video signal to said 4:1 multiplexer; an adder for adding an output signal from said latch to the video signal from said 3:4 line conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of adjacent pixels of the video signal from said 3:4 line conversion means and outputting the divided signal to said 1:3 demultiplexer.

Claim 15

Independent Claim 112 words

An apparatus as set forth in any one of claims 1 to 14, wherein said 3:4 line conversion means includes: coefficient generation means for generating first and second filtering coefficients in response to an input line clock for controlling input timing of the video signal and a synchronous signal; filtering means for filtering the video signal from said scanning format conversion means using a weighted average in consideration of a relative position of an output line with respect to an input line in response to the first and second filtering coefficients from said coefficient generation means; and signal output means for selectively outputting a plurality of output signals from said filtering means.

Claim 16

Dependent Claim 124 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 15, wherein said coefficient generation means includes: a line counter for counting the input line clock in the unit of 2 bits in response to the synchronous signal; a first multiplexer for selecting one of first to third input coefficients in response to first and second output bits from said line counter and outputting the selected input coefficient as the first filtering coefficient to said filtering means; and a second multiplexer for selecting one of fourth to sixth input coefficients in response to the first and second output bits from said line counter and outputting the selected input coefficient as the second filtering coefficient to said filtering means.

Claim 17

Dependent Claim 31 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 16, wherein said line counter is reset upon receiving three of the input line clocks.

Claim 18

Independent Claim 116 words

An apparatus as set forth in any one of Claims 16 or 17, wherein said filtering means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line; a first multiplier for multiplying an output signal from said line memory by the first filtering coefficient from said first multiplexer in said coefficient generation means; a second multiplier for multiplying the video signal from said scanning format conversion means by the second filtering coefficient from said second multiplexer in said coefficient generation means; and an adder for adding output signals from said first and second multipliers and outputting the added signal to said signal output means.

Claim 19

Dependent Claim 97 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 18, wherein said signal output means includes: a first FIFO memory for storing temporarily the output signal from said line memory in said filtering means; a second FIFO memory for storing temporarily an output signal from said adder in said filtering means; a third multiplexer for selecting one of output signals from said first and second FIFO memories; and output control means for controlling said first and second FIFO memories and said third multiplexer in response to the input line clock.

Claim 20

Independent Claim 31 words

An apparatus as set forth in any one of Claims 16 to 19, wherein the sum of the first and second filtering coefficients from said first and second multiplexers is 1.

Claim 21

Independent Claim 50 words

An apparatus as set forth in any one of Claims 19 or 20, wherein said output control means includes: a 2-bit counter for counting the input line clock in the unit of the 2 bits; and an OR gate for ORing first and second output bits from said 2-bit counter.

Claim 22

Independent Claim 152 words

An apparatus as set forth in any one of Claims 1 to 21, wherein said 3:4 line conversion means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line; weighted average calculation means for calculating a weighted average in consideration of a relative position of an output line with respect to an input line in response to the video signal from said scanning format conversion means and an output signal from said line memory; a line counter for counting an input line clock for controlling input timing of the video signal in the unit of 2 bits in response to a synchronous signal and controlling said weighted average calculation means in accordance with the counted result; and signal output means for selectively outputting the output signal from said line memory and an output signal from said weighted average calculation means.

Claim 23

Dependent Claim 204 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 22, wherein said weighted average calculation means includes: a first 4-divider for dividing the video signal from said scanning format conversion means by 4; a first 2-divider for dividing the video signal from said scanning format conversion means by 2; a first adder for adding output signals from said first 4-divider and said first 2-divider; a first multiplexer for selecting one of the output signals from said first 4-divider and said first 2-divider and an output signal from said first adder under the control of said line counter; a second 4-divider for dividing the output signal from said line memory by 4; a second 2-divider for dividing the output signal from said line memory by 2; a second adder for adding output signals from said second 4-divider and said second 2-divider; a second multiplexer for selecting one of the output signals from said second 4-divider and said second 2-divider and an output signal from said second adder under the control of said line counter; and a third adder for adding output signals from said first and second multiplexers and outputting the added signal to said signal output means.

Claim 24

Dependent Claim 96 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 23, wherein said signal output means includes: a first FIFO memory for storing temporarily the output signal from said line memory; a second FIFO memory for storing temporarily an output signal from said third adder in said weighted average calculation means; a third multiplexer for selecting one of output signals from said first and second FIFO memories; and output control means for controlling said first and second FIFO memories and said third multiplexer in response to the input line clock.

Claim 25

Independent Claim 62 words

An apparatus as set forth in any one of Claims 23 or 24, wherein said first and second multiplexers sequentially select the output signals from said first 4-divider and said second adder, the output signals from said first 2-divider and said second 2-divider, and the output signals from said first adder and said second 4-divider under the control of said line counter.

Claim 26

Dependent Claim 31 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 22, wherein said line counter is reset upon receiving three of the input line clocks.

Claim 27

Dependent Claim 48 words

An apparatus as set forth in Claim 24, 25 or 26, wherein said output control means includes: a 2-bit counter for counting the input line clock in the unit of the 2 bits; and an OR gate for ORing first and second output bits from said 2-bit counter.

Claim 28

Independent Claim 112 words

An apparatus as set forth in any one of Claims 1 to 27, wherein said 3:4 pixel conversion means includes: coefficient generation means for generating first and second filtering coefficients in response to an input sample clock for controlling input timing of the video signal and a synchronous signal; filtering means for filtering the video signal from said 3:4 line conversion means using a weighted average in consideration of a relative position of an output pixel with respect to an input pixel in response to the first and second filtering coefficients from said coefficient generation means; and signal output means for selectively outputting a plurality of output signals from said filtering means.

Claim 29

Dependent Claim 124 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 28, wherein said coefficient generation means includes: a 2-bit counter for counting the input sample clock in the unit of 2 bits in response to the synchronous signal; a first multiplexer for selecting one of first to third input coefficients in response to first and second output bits from said 2-bit counter and outputting the selected input coefficient as the first filtering coefficient to said filtering means; and a second multiplexer for selecting one of fourth to sixth input coefficients in response to the first and second output bits from said 2-bit counter and outputting the selected input coefficient as the second filtering coefficient to said filtering means.

Claim 30

Dependent Claim 120 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 29, wherein said filtering means includes: a first latch for storing and delaying the video signal from said 3:4 line conversion means in the unit of pixel; a first multiplier for multiplying an output signal from said first latch by the first filtering coefficient from said first multiplexer in said coefficient generation means; a second multiplier for multiplying the video signal from said 3:4 line conversion means by the second filtering coefficient from said second multiplexer in said coefficient generation means; and an adder for adding output signals from said first and second multipliers and outputting the added signal to said signal output means.

Claim 31

Dependent Claim 148 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 30, wherein said signal output means includes: a second latch for storing temporarily and delaying the output signal from said first latch in said filtering means; a 1:3 demultiplexer for 1:3-demultiplexing an output signal from said adder in said filtering means; a third latch for storing temporarily and delaying an output signal from said second latch; a fourth latch for storing temporarily and delaying a first output signal from said 1:3 demultiplexer; a fifth latch for storing temporarily and delaying a second output signal from said 1:3 demultiplexer; a sixth latch for storing temporarily and delaying an output signal from said fourth latch; and a 4:1 multiplexer for selectively outputting output signals from said third latch, said fifth latch and said sixth latch and a third output signal from said 1:3 demultiplexer.

Claim 32

Independent Claim 31 words

An apparatus as set forth in any one of Claims 29 to 31, wherein the sum of the first and second filtering coefficients from said first and second multiplexers is 1.

Claim 33

Independent Claim 74 words

An apparatus as set forth in any one of Claims 1 to 32, wherein said 4:3 line conversion means includes: filtering means for delaying and filtering the video signal from said scanning format conversion means; signal output means for selectively outputting a plurality of output signals from said filtering means; and output control means for controlling said signal output means in response to input/output line clocks for controlling input/output timing of the video signal.

Claim 34

Dependent Claim 121 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 33, wherein said filtering means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line and outputting the delayed video signal to said signal output means; an adder for adding an output signal from said line memory to the video signal from said scanning format conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of pixels in the same positions of adjacent lines of the video signal from said scanning format conversion means and outputting the divided signal to said signal output means.

Claim 35

Dependent Claim 73 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 34, wherein said signal output means includes: a first FIFO memory for storing temporarily the output signal from said line memory in said filtering means; a second FIFO memory for storing temporarily an output signal from said divider in said filtering means; and a multiplexer for outputting selectively output signals from said first and second FIFO memories.

Claim 36

Dependent Claim 236 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 35, wherein said output control means includes: a first line counter for counting the input line clock in the unit of 2 bits; a second line counter for counting the output line clock in the unit of the 2 bits; a first NOT gate for inverting a first output bit from said first line counter; a NOR gate for NORing an output signal from said first NOT gate and a second output bit from said first line counter and outputting the NORed signal to said second FIFO memory in said signal output means for the control of a write operation thereof; a latch for storing temporarily the second output bit from said first line counter for the control of a write operation of said first FIFO memory in said signal output means; a second NOT gate for inverting a first output bit from said second line counter; an OR gate for ORing an output signal from said second NOT gate and a second output bit from said second line counter and outputting the ORed signal to said first FIFO memory for the control of a read operation thereof; and a third NOT gate for inverting an output signal from said OR gate and outputting the inverted signal to said second FIFO memory for the control of a read operation thereof.

Claim 37

Independent Claim 78 words

An apparatus as set forth in any one of Claims 1 to 36, wherein said 4:3 pixel conversion means includes: filtering means for delaying and filtering the video signal from said 4:3 line conversion means; a first 1:4 demultiplexer for 1:4-demultiplexing the delayed video signal from said filtering means; a second 1:4 demultiplexer for 1:4-demultiplexing the filtered video signal from said filtering means; and a 3:1 multiplexer for 3:1-multiplexing output signals from said first and second 1:4 demultiplexers.

Claim 38

Dependent Claim 113 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 37, wherein said filtering means includes: a latch for storing and delaying the video signal from said 4:3 line conversion means in the unit of pixel and outputting the delayed video signal to said first 1:4 demultiplexer; an adder for adding an output signal from said latch to the video signal from said 4:3 line conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of adjacent pixels of the video signal from said 4:3 line conversion means and outputting the divided signal to said second 1:4 demultiplexer.

Claim 39

Independent Claim 110 words

An apparatus as set forth in any one of Claims 1 to 38, wherein said 4:3 line conversion means includes: coefficient generation means for generating first and second filtering coefficients in response to an input line clock for controlling input timing of the video signal and a synchronous signal; filtering means for filtering the video signal from said scanning format conversion means using a weighted average in consideration off a relative position of an output line with respect to an input line in response to the first and second filtering coefficients from said coefficient generation means; and signal output means for selectively outputting an output signal from said filtering means.

Claim 40

Dependent Claim 124 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 39, wherein said coefficient generation means includes: a line counter for counting the input line clock in the unit of 2 bits in response to the synchronous signal; a first multiplexer for selecting one of first to fourth input coefficients in response to first and second output bits from said line counter and outputting the selected input coefficient as the first filtering coefficient to said filtering means; and a second multiplexer for selecting one of fifth to eighth input coefficients in response to the first and second output bits from said line counter and outputting the selected input coefficient as the second filtering coefficient to said filtering means.

Claim 41

Dependent Claim 120 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 40, wherein said filtering means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line; a first multiplier for multiplying an output signal from said line memory by the first filtering coefficient from said first multiplexer in said coefficient generation means; a second multiplier for multiplying the video signal from said scanning format conversion means by the second filtering coefficient from said second multiplexer in said coefficient generation means; and an adder for adding output signals from said first and second multipliers and outputting the added signal to said signal output means.

Claim 42

Dependent Claim 50 words

An apparatus as set forth in Claim 39, 40 or 41, wherein said signal output means includes: an FIFO memory for storing temporarily the output signal from said filtering means; and output control means for controlling a write operation of said FIFO memory in response to the input line clock.

Claim 43

Dependent Claim 29 words

An apparatus as set forth in Claim 40, 41 or 42, wherein the sum of the first and second filtering coefficients from said first and second multiplexers is 1.

Claim 44

Dependent Claim 92 words

An apparatus as set forth in Claim 42 or 43, wherein said output control means includes: a 2-bit counter for counting the input line clock in the unit of the 2 bits; a first NOT gate for inverting a first output bit from said 2-bit counter; a second NOT gate for inverting a second output bit from said 2-bit counter; and an OR gate for ORing output signals from said first and second NOT gates and outputting the ORed signal to said FIFO memory for the control of the write operation thereof.

Claim 45

Independent Claim 144 words

An apparatus as set forth in any one of Claims 1 to 44, wherein said 4:3 line conversion means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line; weighted average calculation means for calculating a weighted average in consideration of a relative position of an output line with respect to an input line in response to the video signal from said scanning format conversion means and an output signal from said line memory; a line counter for counting an input line clock for controlling input timing of the video signal in the unit of 2 bits in response to a synchronous signal and controlling said weighted average calculation means in accordance with the counted result; and signal output means for selectively outputting an output signal from said weighted average calculation means.

Claim 46

Dependent Claim 326 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 45, wherein said weighted average calculation means includes: a first 16-divider for dividing the video signal from said scanning format conversion means by 16; a first 4-divider for dividing the video signal from said scanning format conversion means by 4; a first 2-divider for dividing the video signal from said scanning format conversion means by 2; a first adder for adding output signals from said first 4-divider and said first 2-divider; a second adder for adding an output signal from said first 16-divider and the output signal from said first 4-divider; a first subtracter for obtaining a difference between an output signal from said first adder and the output signal from said first 16-divider; a first multiplexer for selecting one of the video signal from said scanning format conversion means, output signals from said second adder and said first subtracter and a ground signal under the control of said line counter; a second 16-divider for dividing the output signal from said line memory by 16; a second 4-divider for dividing the output signal from said line memory by 4; a second 2-divider for dividing the output signal from said line memory by 2; a third adder for adding output signals from said second 4-divider and said second 2-divider; a fourth adder for adding an output signal from said second 16-divider and the output signal from said second 4-divider; a second subtracter for obtaining a difference between an output signal from said third adder and the output signal from said second 16-divider; a second multiplexer for selecting one of the output signal from said line memory, output signals from said fourth adder and said second subtracter and the ground signal under the control of said line counter; and a fifth adder for adding output signals from said first and second multiplexers and outputting the added signal to said signal output means.

Claim 47

Dependent Claim 51 words

An apparatus as set forth in Claim 45 or 46, wherein said signal output means includes: an FIFO memory for storing temporarily the output signal from said weighted average calculation means; and output control means for controlling a write operation of said FIFO memory in response to the input line clock.

Claim 48

Dependent Claim 72 words

An apparatus as set forth in Claim 46 or 47, wherein said first and second multiplexers sequentially select the ground signal and the output signal from said line memory, the output signals from said first subtracter and said fourth adder, the output signals from said second adder and said second subtracter, and the video signal from said scanning format conversion means and the ground signal under the control of said line counter.

Claim 49

Dependent Claim 92 words

An apparatus as set forth in Claim 47 or 48, wherein said output control means includes: a 2-bit counter for counting the input line clock in the unit of the 2 bits; a first NOT gate for inverting a first output bit from said 2-bit counter; a second NOT gate for inverting a second output bit from said 2-bit counter; and an OR gate for ORing output signals from said first and second NOT gates and outputting the ORed signal to said FIFO memory for the control of the read operation thereof.

Claim 50

Independent Claim 130 words

An apparatus as set forth in any one of Claims 1 to 49, wherein said 4:3 pixel conversion means includes: coefficient generation means for generating first and second filtering coefficients in response to an input sample clock for controlling input timing of the video signal and a synchronous signal; filtering means for filtering the video signal from said 4:3 line conversion means using a weighted average in consideration of a relative position of an output pixel with respect to an input pixel in response to the first and second filtering coefficients from said coefficient generation means; and signal output means for selectively outputting an output signal from said filtering means in response to the input sample clock and an output sample clock for controlling output timing of the video signal.

Claim 51

Dependent Claim 124 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 50, wherein said coefficient generation means includes: a 2-bit counter for counting the input sample clock in the unit of 2 bits in response to the synchronous signal; a first multiplexer for selecting one of first to fourth input coefficients in response to first and second output bits from said 2-bit counter and outputting the selected input coefficient as the first filtering coefficient to said filtering means; and a second multiplexer for selecting one of fifth to eighth input coefficients in response to the first and second output bits from said 2-bit counter and outputting the selected input coefficient as the second filtering coefficient to said filtering means.

Claim 52

Dependent Claim 118 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 51, wherein said filtering means includes: a latch for storing and delaying the video signal from said 4:3 line conversion means in the unit of pixel; a first multiplier for multiplying an output signal from said latch by the first filtering coefficient from said first multiplexer in said coefficient generation means; a second multiplier for multiplying the video signal from said 4:3 line conversion means by the second filtering coefficient from said second multiplexer in said coefficient generation means; and an adder for adding output signals from said first and second multipliers and outputting the added signal to said signal output means.

Claim 53

Dependent Claim 65 words

An apparatus as set forth in Claim 50, 51 or 52, wherein said signal output means includes: a 1:4 demuitiplexer for 1:4-demultiplexing the output signal from said filtering means; a 4:1 multiplexer for 4:1-multiplexing output signals from said 1:4 demultiplexer; and output control means for controlling said 1:4 demultiplexer and said 4:1 multiplexer in response to the input sample clock and the output sample clock.

Claim 54

Dependent Claim 29 words

An apparatus as set forth in Claim 51, 52 or 53, wherein the sum of the first and second filtering coefficients from said first and second multiplexers is 1.

Claim 55

Dependent Claim 136 words

An apparatus as set forth in Claim 53 or 54, wherein said output control means includes: a first 2-bit counter for counting the input sample clock in the unit of the 2 bits and providing first and second output bits to control said 1:4 demultiplexer in accordance with the counted result; a second 2-bit counter for counting the output sample clock in the unit of the 2 bits and providing first and second output bits to control said 4:1 multiplexer in accordance with the counted result; a NOT gate for inverting the first output bit from said second 2-bit counter; and an AND gate for ANDing the second output bit from said second 2-bit counter and an output signal from said NOT gate and outputting the ANDed signal to said second 2-bit counter to control it.

Claim 56

Independent Claim 72 words

An apparatus as set forth in any one of Claims 1 to 55, wherein said 2:1 line conversion means includes: filtering means for delaying and filtering the video signal from said scanning format conversion means; an FIFO memory for storing temporarily an output signal from said filtering means; and output control means for controlling said FIFO memory in response to an input line clock for controlling input timing of the video signal.

Claim 57

Dependent Claim 109 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 56, wherein said filtering means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line; an adder for adding an output signal from said line memory to the video signal from said scanning format conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of pixels in the same positions of adjacent lines of the video signal from said scanning format conversion means and outputting the divided signal to said FIFO memory.

Claim 58

Dependent Claim 63 words

An apparatus as set forth in Claim 56 or 57, wherein said output control means includes: a line counter for counting the input line clock in the unit of 2 bits; and a NOT gate for inverting a first one of two output bits from said line counter and outputting the inverted signal to said FIFO memory to control a write operation thereof.

Claim 59

Independent Claim 48 words

An apparatus as set forth in any one of Claims 1 to 58, wherein said 2:1 pixel conversion means includes: filtering means for delaying and filtering the video signal from said 2:1 line conversion means; and a 1:2 demultiplexer for 1:2-demultiplexing an output signal from said filtering means.

Claim 60

Dependent Claim 101 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 59, wherein said filtering means includes: a latch for storing and delaying the video signal from said 2:1 line conversion means in the unit of pixel; an adder for adding an output signal from said latch to the video signal from said 2:1 line conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of adjacent pixels of the video signal from said 2:1 line conversion means and outputting the divided signal to said 1:2 demultiplexer.

Claim 61

Independent Claim 72 words

An apparatus as set forth in any one of Claims 1 to 60, wherein said 3:2 line conversion means includes: filtering means for delaying and filtering the video signal from said scanning format conversion means; an FIFO memory for storing temporarily an output signal from said filtering means; and output control means for controlling said FIFO memory in response to an input line clock for controlling input timing of the video signal.

Claim 62

Dependent Claim 109 words

An apparatus for converting a frame format of a television signal, as set forth in Claim 61, wherein said filtering means includes: a line memory for storing and delaying the video signal from said scanning format conversion means in the unit of line; an adder for adding an output signal from said line memory to the video signal from said scanning format conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of pixels in the same positions of adjacent lines of the video signal from said scanning format conversion means and outputting the divided signal to said FIFO memory.

Claim 63

Dependent Claim 93 words

An apparatus as set forth in Claim 61 or 62, wherein said output control means includes: a line counter for counting the input line clock in the unit of 2 bits; a NOT gate for inverting a first output bit from said line counter and outputting the inverted signal to said FIFO memory to control a write operation thereof; and an AND gate for ANDing a second output bit from said line counter and an output signal from said NOT gate and outputting the ANDed signal to said line counter to control it.

Claim 64

Independent Claim 78 words

An apparatus as set forth in any one of Claims 1 to 63, wherein said 3:2 pixel conversion means includes: filtering means for delaying and filtering the video signal from said 3:2 line conversion means; a first 1:3 demultiplexer for 1:3-demultiplexing the delayed video signal from said filtering means; a second 1:3 demultiplexer for 1:3-demultiplexing the filtered video signal from said filtering means; and a 2:1 multiplexer for 2:1-multiplexing output signals from said first and second 1:3 demultiplexers.

Claim 65

Dependent Claim 103 words

An apparatus as set forth in Claim 64, wherein said filtering means includes: a latch for storing and delaying the video signal from said 3:2 line conversion means in the unit of pixel and outputting the delayed video signal to said first 1:3 demultiplexer; an adder for adding an output-signal from said latch to the video signal from said 3:2 line conversion means; and a divider for dividing an output signal from said adder by 2 to obtain an average of adjacent pixels of the video signal from said 3:2 line conversion means and outputting the divided signal to said second 1:3 demultiplexer.

Apparatus for converting frame format of television signal

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